H10W 72/385
Alignment aids
Official title: {Alignment aids, e.g. alignment marks}
H10W72/385 (Alignment aids) appears on 77 US grants and 87 published applications in this corpus.
Search patents in H10W- Granted patents
- 77
- Published applications
- 87
- Assignees
- 50
- Inventors
- 177
- Latest grant
- 25 Nov 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1994 | 1 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 0 |
| 2003 | 0 | 0 |
| 2004 | 0 | 1 |
| 2005 | 1 | 1 |
| 2006 | 0 | 1 |
| 2007 | 0 | 1 |
| 2008 | 0 | 3 |
| 2009 | 2 | 2 |
| 2010 | 1 | 0 |
| 2011 | 4 | 2 |
| 2012 | 1 | 5 |
| 2013 | 1 | 5 |
| 2014 | 3 | 2 |
| 2015 | 6 | 8 |
| 2016 | 6 | 4 |
| 2017 | 2 | 3 |
| 2018 | 2 | 1 |
| 2019 | 4 | 5 |
| 2020 | 5 | 13 |
| 2021 | 9 | 13 |
| 2022 | 8 | 4 |
| 2023 | 8 | 5 |
| 2024 | 9 | 2 |
| 2025 | 4 | 3 |
| 2026 | 0 | 3 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Substrates with spacers, including substrates with solder resist spacers, and associated devices, systems, and methods25 Nov 2025US 12,482,781 B2Micron Technology, Inc.
- Chip package structure with redistribution layer having bonding portion7 Oct 2025US 12,438,120 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Electronic chip support device and corresponding manufacturing method8 Apr 2025US 12,272,922 B2STMicroelectronics (Grenoble 2) SAS
- Method and structure to control the solder thickness for double sided cooling power module4 Mar 2025US 12,243,845 B2Hyundai Motor Company
- Semiconductor devices and methods of manufacturing semiconductor devices24 Dec 2024US 12,176,256 B2Amkor Technology Singapore Holding Pte.Ltd.
- Substrates with spacers, including substrates with solder resist spacers, and associated devices, systems, and methods19 Mar 2026US 2026/0082935 A1Micron Technology, Inc.
- Wire bond obstruction mitigation using wire bond stud bumps19 Feb 2026US 2026/0053041 A1Qorvo US, Inc.
- Package structure and method for fabricating the same1 Jan 2026US 2026/0005149 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor package and method of manufacturing the same18 Dec 2025US 2025/0385212 A1Samsung Electronics Co., Ltd.
- Chip package structure with redistribution layer having bonding portion20 Nov 2025US 2025/0357420 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Method of self-assembly on a surface62US 7,774,929 B2Regents of the University of Minnesota · 2010
- Integrated circuit package and method33US 10,504,824 B1Taiwan Semiconductor Manufacturing Company.Ltd · 2019
- Semiconductor device and method of manufacturing the same24US 6,958,544 B2Shinko Electric Industries Co., Ltd. · 2005
- 4D device process and structure22US 8,247,895 B2International Business Machines Corporation · 2012
- Adhesive for electronic components, method for manufacturing semiconductor chip laminate, and semiconductor device20US 7,915,743 B2Sekisui Chemical Co., Ltd. · 2011