H10W 72/355
Of outermost layers of multilayered die-attach connectors
Official title: {of outermost layers of multilayered die-attach connectors, e.g. material of a coating}
H10W72/355 (Of outermost layers of multilayered die-attach connectors) appears on 147 US grants and 207 published applications in this corpus.
Search patents in H10W- Granted patents
- 147
- Published applications
- 207
- Assignees
- 116
- Inventors
- 473
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1980 | 1 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 1 | 0 |
| 2001 | 2 | 0 |
| 2002 | 1 | 1 |
| 2003 | 3 | 2 |
| 2004 | 1 | 1 |
| 2005 | 0 | 3 |
| 2006 | 1 | 2 |
| 2007 | 1 | 2 |
| 2008 | 2 | 4 |
| 2009 | 0 | 4 |
| 2010 | 2 | 8 |
| 2011 | 1 | 3 |
| 2012 | 3 | 10 |
| 2013 | 7 | 5 |
| 2014 | 6 | 10 |
| 2015 | 5 | 9 |
| 2016 | 11 | 14 |
| 2017 | 10 | 16 |
| 2018 | 8 | 9 |
| 2019 | 13 | 11 |
| 2020 | 12 | 9 |
| 2021 | 6 | 15 |
| 2022 | 14 | 14 |
| 2023 | 6 | 13 |
| 2024 | 11 | 15 |
| 2025 | 11 | 16 |
| 2026 | 8 | 11 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Package structure with protective lid6 Oct 2026US 12,757,797 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Die bonding structure and method of manufacturing the same29 Sep 2026US 12,751,124 B2Materials Technology Corporation
- Semiconductor package and method of manufacturing the same1 Sep 2026US 12,727,175 B2Samsung Electronics Co., Ltd.
- Integration and bonding of micro-devices into system substrate11 Aug 2026US 12,707,781 B2VueReal Inc.
- Semiconductor package14 Jul 2026US 12,685,200 B2Samsung Electronics Co., Ltd.
- Semiconductor package8 Oct 2026US 2026/0314457 A1Samsung Electronics Co., Ltd.
- Integrated circuits with fusion-bonded diamond substrates for thermal management24 Sep 2026US 2026/0293674 A1Intel Corporation
- Semiconductor module manufacturing device and semiconductor module manufacturing method10 Sep 2026US 2026/0271765 A1Rohm Co., Ltd.
- Semiconductor device3 Sep 2026US 2026/0262546 A1Rohm Co., Ltd.
- Dam application for exposed die with flat lid structure packages13 Aug 2026US 2026/0239969 A1QUALCOMM Incorporated
Most cited
By later US patents
- Method and structure for wafer to wafer bonding in semiconductor packaging237US 8,377,798 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2013
- Three-dimensional (3D) integrated circuit with enhanced copper-to-copper bonding214US 8,546,956 B2International Business Machines Corporation · 2013
- Semiconductor flip-chip assembly with pre-applied encapsulating layers169US 6,297,560 B12001
- Semiconductor flip-chip package and method for the fabrication thereof141US 6,121,689 AMiguel Albert Capote · 2000
- Semiconductor flip-chip package and method for the fabrication thereof101US 6,518,677 B12003