H10W 72/285
Alignment aids
Official title: {Alignment aids, e.g. alignment marks}
H10W72/285 (Alignment aids) appears on 300 US grants and 317 published applications in this corpus.
Search patents in H10W- Granted patents
- 300
- Published applications
- 317
- Assignees
- 165
- Inventors
- 670
- Latest grant
- 14 Apr 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1985 | 1 | 0 |
| 1986 | 1 | 0 |
| 1987 | 0 | 0 |
| 1988 | 1 | 0 |
| 1989 | 1 | 0 |
| 1990 | 1 | 0 |
| 1991 | 2 | 0 |
| 1992 | 1 | 0 |
| 1993 | 2 | 0 |
| 1994 | 4 | 0 |
| 1995 | 3 | 0 |
| 1996 | 2 | 0 |
| 1997 | 4 | 0 |
| 1998 | 0 | 0 |
| 1999 | 4 | 0 |
| 2000 | 11 | 0 |
| 2001 | 4 | 2 |
| 2002 | 3 | 14 |
| 2003 | 13 | 18 |
| 2004 | 8 | 10 |
| 2005 | 11 | 14 |
| 2006 | 11 | 14 |
| 2007 | 8 | 19 |
| 2008 | 11 | 9 |
| 2009 | 12 | 18 |
| 2010 | 7 | 6 |
| 2011 | 13 | 11 |
| 2012 | 5 | 18 |
| 2013 | 9 | 12 |
| 2014 | 12 | 18 |
| 2015 | 22 | 34 |
| 2016 | 24 | 11 |
| 2017 | 17 | 10 |
| 2018 | 15 | 6 |
| 2019 | 9 | 12 |
| 2020 | 9 | 12 |
| 2021 | 7 | 13 |
| 2022 | 10 | 11 |
| 2023 | 8 | 7 |
| 2024 | 8 | 4 |
| 2025 | 5 | 7 |
| 2026 | 1 | 7 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Driving substrate, micro LED transfer device and micro LED transfer method14 Apr 2026US 12,604,567 B2Hkc Corporation Limited
- Semiconductor package including stress buffers and methods of forming the same23 Dec 2025US 12,506,090 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Integrated mechanical aids for high accuracy alignable-electrical contacts14 Oct 2025US 12,444,712 B1HRL Laboratories, LLC
- Self-guided placement of memory device component packages1 Jul 2025US 12,349,278 B2SanDisk Technologies LLC
- Semiconductor device27 May 2025US 12,315,823 B2Kabushiki Kaisha Toshiba
- Semiconductor package2 Jul 2026US 2026/0191021 A1Samsung Electronics Co., Ltd.
- Semiconductor package and method of manufacturing the same11 Jun 2026US 2026/0165122 A1Samsung Electronics Co., Ltd.
- Aligning bumps in fan-out packaging process21 May 2026US 2026/0144125 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Chip packaging method and chip packaging structure7 May 2026US 2026/0130255 A1inSync Resonance Inc
- Semiconductor package including connectors and method for manufacturing the same30 Apr 2026US 2026/0123492 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Method for forming elongated solder connections between a semiconductor device and a supporting substrate304US 4,545,610 AInternational Business Machines Corporation · 1985
- Integrated circuit with interface tile for coupling to a stacked-die second integrated circuit303US 7,068,072 B2Xilinx, Inc. · 2006
- Process for controlling solder joint geometry when surface mounting a leadless integrated circuit package on a substrate244US 4,878,611 AAmerican Telephone and Telegraph Company, AT&T Bell Laboratories · 1989
- Direct die contact (DDC) semiconductor package193US 6,150,717 AMicron Technology, Inc. · 2000
- Chip mounting substrate having an integral molded projection and conductive pattern189US 5,081,520 AMinolta Camera Kabushiki Kaisha · 1992