H10W 20/046
The barrier, adhesion or liner layers being associated with interconnections of capacitors
Official title: {the barrier, adhesion or liner layers being associated with interconnections of capacitors}
H10W20/046 (The barrier, adhesion or liner layers being associated with interconnections of capacitors) appears on 326 US grants and 310 published applications in this corpus.
Search patents in H10W- Granted patents
- 326
- Published applications
- 310
- Assignees
- 96
- Inventors
- 488
- Latest grant
- 5 May 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1995 | 3 | 0 |
| 1996 | 1 | 0 |
| 1997 | 1 | 0 |
| 1998 | 3 | 0 |
| 1999 | 6 | 0 |
| 2000 | 5 | 0 |
| 2001 | 19 | 14 |
| 2002 | 22 | 32 |
| 2003 | 30 | 29 |
| 2004 | 32 | 27 |
| 2005 | 16 | 26 |
| 2006 | 25 | 32 |
| 2007 | 17 | 17 |
| 2008 | 14 | 13 |
| 2009 | 13 | 11 |
| 2010 | 12 | 12 |
| 2011 | 15 | 7 |
| 2012 | 7 | 11 |
| 2013 | 8 | 6 |
| 2014 | 5 | 7 |
| 2015 | 7 | 11 |
| 2016 | 12 | 8 |
| 2017 | 8 | 4 |
| 2018 | 2 | 7 |
| 2019 | 6 | 4 |
| 2020 | 9 | 10 |
| 2021 | 7 | 6 |
| 2022 | 2 | 0 |
| 2023 | 4 | 6 |
| 2024 | 10 | 3 |
| 2025 | 2 | 4 |
| 2026 | 3 | 3 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
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- Treatment of electrodes of MIM capacitors21 Apr 2026US 12,610,564 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor structure including an electrode cover layer over a capacitor of a dynamic random access memory (DRAM) formed in a substrate, and a contact structure electrically connected to the electrode cover layer, and method of making the same6 Jan 2026US 12,519,014 B2Changxin Memory Technologies, Inc.
- Planarization system and method4 Nov 2025US 12,463,042 B2Canon Kabushiki Kaisha
- Metal-insulator-metal (MIM) capacitor module with outer electrode extension20 May 2025US 12,310,041 B2Microchip Technology Incorporated
- Semiconductor device including stacked deep trench capacitor structure24 Sep 2026US 2026/0293664 A1DB HiTek Co., Ltd.
- Integration scheme for fabricating high precision, low capacitor with unlanded via3 Sep 2026US 2026/0262235 A1Samsung Electronics Co., Ltd.
- Treatment of electrodes of mim capacitors30 Jul 2026US 2026/0223378 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Structure and Method for Three-Dimensional Capacitor with Enhanced Packaging Density and Reduced Warpage20 Nov 2025US 2025/0357309 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Metal-insulator-metal (mim) capacitor module with outer electrode extension14 Aug 2025US 2025/0261385 A1Microchip Technology Incorporated
Most cited
By later US patents
- Method of forming metal layer using atomic layer deposition and semiconductor device having the metal layer as barrier metal layer or upper or lower electrode of capacitor1,063US 6,287,965 B1Samsung Electronics Co., Ltd. · 2001
- Semiconductor devices having metal layers as barrier layers on upper or lower electrodes of capacitors597US 6,590,251 B2Samsung Electronics Co., Ltd. · 2003
- Capacitor compatible with high dielectric constant materials having two independent insulative layers and the method for forming same215US 5,392,189 AMicron Semiconductor, Inc. · 1995
- Capacitor compatible with high dielectric constant materials having a low contact resistance layer and the method for forming same174US 5,381,302 AMicron Semiconductor, Inc. · 1995
- Method for forming capacitor compatible with high dielectric constant materials having a low contact resistance layer174US 5,506,166 AMicron Technology, Inc. · 1996