H10W 20/044
For electroless plating
Official title: {for electroless plating}
H10W20/044 (For electroless plating) appears on 427 US grants and 495 published applications in this corpus.
Search patents in H10W- Granted patents
- 427
- Published applications
- 495
- Assignees
- 142
- Inventors
- 904
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1994 | 1 | 0 |
| 1995 | 0 | 0 |
| 1996 | 2 | 0 |
| 1997 | 2 | 0 |
| 1998 | 2 | 0 |
| 1999 | 4 | 0 |
| 2000 | 5 | 0 |
| 2001 | 21 | 7 |
| 2002 | 24 | 24 |
| 2003 | 18 | 35 |
| 2004 | 26 | 43 |
| 2005 | 27 | 44 |
| 2006 | 21 | 43 |
| 2007 | 24 | 30 |
| 2008 | 18 | 19 |
| 2009 | 21 | 10 |
| 2010 | 15 | 18 |
| 2011 | 16 | 13 |
| 2012 | 11 | 15 |
| 2013 | 9 | 7 |
| 2014 | 16 | 10 |
| 2015 | 9 | 21 |
| 2016 | 15 | 25 |
| 2017 | 22 | 22 |
| 2018 | 16 | 14 |
| 2019 | 15 | 23 |
| 2020 | 19 | 24 |
| 2021 | 18 | 14 |
| 2022 | 12 | 11 |
| 2023 | 4 | 6 |
| 2024 | 8 | 11 |
| 2025 | 2 | 5 |
| 2026 | 4 | 1 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Substrate liquid processing method, and recording medium6 Oct 2026US 12,757,697 B2Tokyo Electron Limited
- Manufacturing method for device embedded packaging structure30 Jun 2026US 12,672,529 B2Zhuhai ACCESS Semiconductor Co., Ltd.
- Chip package having four sides provided with electromagnetic interference shielding layers and method of manufacturing the same19 May 2026US 12,635,525 B2Walton Advanced Engineering Inc.
- Doping processes in metal interconnect structures24 Feb 2026US 12,564,039 B2Lam Research Corporation
- Method for fabricating a semiconductor device30 Dec 2025US 12,512,367 B2Samsung Electronics Co., Ltd.
- Doping processes in metal interconnect structures5 Mar 2026US 2026/0068630 A1Lam Research Corporation
- Semiconductor structure and method of forming the same7 Aug 2025US 2025/0254907 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Substrate processing method and substrate processing system10 Jul 2025US 2025/0226228 A1Tokyo Electron Limited
- Tungsten feature fill with nucleation inhibition8 May 2025US 2025/0149383 A1Novellus Systems, Inc.
- Vias including an electroplated layer and methods for fabricating the vias30 Jan 2025US 2025/0038010 A1Corning Incorporated
Most cited
By later US patents
- Selective electroless copper deposited interconnect plugs for ULSI applications638US 5,674,787 ASematech, Inc. · 1997
- Plated copper interconnect structure621US 5,969,422 AAdvanced Micro Devices, Inc. · 1999
- Method and structure to improve reliability of copper interconnects562US 7,129,165 B2ASM Nutool, Inc. · 2006
- Seed layer deposition558US 6,824,665 B2Shipley Company, L.L.C. · 2004
- Chip interconnect and packaging deposition methods and structures556US 7,147,766 B2ASM Nutool, Inc. · 2006