H10W 20/0261
Characterised by the filling method or the material of the conductive fill
Official title: {characterised by the filling method or the material of the conductive fill}
H10W20/0261 (Characterised by the filling method or the material of the conductive fill) appears on 724 US grants and 904 published applications in this corpus.
Search patents in H10W- Granted patents
- 724
- Published applications
- 904
- Assignees
- 231
- Inventors
- 1,418
- Latest grant
- 21 Jul 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 2 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 1 | 0 |
| 1994 | 0 | 0 |
| 1995 | 1 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 1 | 2 |
| 2002 | 2 | 3 |
| 2003 | 8 | 15 |
| 2004 | 6 | 16 |
| 2005 | 13 | 29 |
| 2006 | 14 | 39 |
| 2007 | 19 | 35 |
| 2008 | 17 | 34 |
| 2009 | 24 | 27 |
| 2010 | 29 | 35 |
| 2011 | 32 | 46 |
| 2012 | 32 | 62 |
| 2013 | 46 | 63 |
| 2014 | 48 | 65 |
| 2015 | 53 | 61 |
| 2016 | 53 | 46 |
| 2017 | 47 | 45 |
| 2018 | 39 | 38 |
| 2019 | 44 | 36 |
| 2020 | 41 | 34 |
| 2021 | 33 | 27 |
| 2022 | 21 | 41 |
| 2023 | 20 | 44 |
| 2024 | 31 | 25 |
| 2025 | 37 | 21 |
| 2026 | 8 | 15 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Semiconductor structure and method manufacturing the same21 Jul 2026US 12,690,224 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device with through hole electrode wiring9 Jun 2026US 12,653,012 B2Sony Semiconductor Solutions Corporation
- Coating method for making chip, chip substrate, and chip21 Apr 2026US 12,610,799 B2Tencent Technology (Shenzhen) Company Limited
- Method for producing a through semiconductor via connection7 Apr 2026US 12,598,966 B2Imec Vzw
- Through silicon via interconnection structure and method of forming same, and quantum computing device7 Apr 2026US 12,598,967 B2Tencent Technology (Shenzhen) Company Limited
- Method for forming through wafer via8 Oct 2026US 2026/0314349 A1Skyworks Solutions, Inc.
- Semiconductor device and method of manufacturing semiconductor device24 Sep 2026US 2026/0293641 A1Mitsubishi Electric Corporation
- Method for depositing copper thin film in through glass via using atomic sputtering epitaxy27 Aug 2026US 2026/0255981 A1Cit, S.A.
- Method of manufacturing substrate having through-via30 Jul 2026US 2026/0223297 A1Korea Electronics Technology Institute
- Methods of manufacturing superconducting via through semiconductor wafer30 Jul 2026US 2026/0223613 A1Oxford Instruments Nanotechnology Tools Limited
Most cited
By later US patents
- Method and apparatus for 3D interconnect542US 8,076,237 B2ASM America, Inc. · 2011
- High density data storage using stacked wafers481US 5,229,647 AMicron Technology, Inc. · 1993
- Chip and wafer integration process using vertical connections388US 6,599,778 B2International Business Machines Corporation · 2003
- Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavities352US 7,049,170 B2Tru-Si Technologies, Inc. · 2006
- Packaging substrates for integrated circuits and soldering methods326US 7,060,601 B2Tru-Si Technologies, Inc. · 2006