H10W 20/0253
Comprising forming the through-semiconductor vias after stacking of the chips, wafers or
Official title: {comprising forming the through-semiconductor vias after stacking of the chips, wafers or substrates}
H10W20/0253 (Comprising forming the through-semiconductor vias after stacking of the chips, wafers or) appears on 467 US grants and 606 published applications in this corpus.
Search patents in H10W- Granted patents
- 467
- Published applications
- 606
- Assignees
- 110
- Inventors
- 721
- Latest grant
- 16 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1994 | 1 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 1 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 0 |
| 2003 | 0 | 1 |
| 2004 | 1 | 1 |
| 2005 | 3 | 2 |
| 2006 | 1 | 7 |
| 2007 | 2 | 6 |
| 2008 | 9 | 8 |
| 2009 | 5 | 9 |
| 2010 | 7 | 8 |
| 2011 | 9 | 15 |
| 2012 | 6 | 22 |
| 2013 | 14 | 12 |
| 2014 | 21 | 21 |
| 2015 | 21 | 46 |
| 2016 | 39 | 29 |
| 2017 | 36 | 27 |
| 2018 | 24 | 23 |
| 2019 | 23 | 25 |
| 2020 | 23 | 35 |
| 2021 | 30 | 54 |
| 2022 | 42 | 68 |
| 2023 | 46 | 68 |
| 2024 | 47 | 44 |
| 2025 | 34 | 43 |
| 2026 | 22 | 32 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Chip stacking structure and manufacturing method thereof, chip package structure, and electronic device16 Jun 2026US 12,660,710 B2Huawei Technologies Co., Ltd.
- Advanced interconnection for wafer on wafer packaging9 Jun 2026US 12,653,013 B2Micron Technology, Inc.
- Semiconductor device and manufacturing method thereof2 Jun 2026US 12,648,459 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Multi-channel device stacking26 May 2026US 12,642,110 B2Adeia Semiconductor Bonding Technologies Inc.
- Semiconductor die stacks and associated systems and methods19 May 2026US 12,635,148 B2Micron Technology, Inc.
- Semiconductor structure, forming method thereof, semiconductor device and memory system13 Aug 2026US 2026/0239630 A1Yangtze Memory Technologies Co., Ltd.
- Integrated chip and method of manufacturing the same6 Aug 2026US 2026/0231554 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device and method6 Aug 2026US 2026/0231749 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor devices, methods of operating thereof, package structures, and systems30 Jul 2026US 2026/0223662 A1Yangtze Memory Technologies Holding Co., Ltd.
- Stacked capacitor device and manufacturing method thereof30 Jul 2026US 2026/0223666 A1Winbond Electronics Corp.
Most cited
By later US patents
- Three-dimensional integrated semiconductor devices526US 6,943,067 B2Advanced Micro Devices, Inc. · 2005
- 3D IC method and device388US 7,485,968 B2Ziptronix, Inc. · 2009
- Heterogeneously integrated microsystem-on-a-chip337US 7,335,972 B2Sandia Corporation · 2008
- 3D IC method and device251US 9,171,756 B2Ziptronix, Inc. · 2015
- 3D integrated circuits using thick metal for backside connections and offset bumps246US 7,410,884 B2Intel Corporation · 2008