H10W 20/0242
Comprising etching via holes from the back sides of the chips, wafers
Official title: {comprising etching via holes from the back sides of the chips, wafers or substrates}
H10W20/0242 (Comprising etching via holes from the back sides of the chips, wafers) appears on 2,343 US grants and 2,875 published applications in this corpus.
Search patents in H10W- Granted patents
- 2,343
- Published applications
- 2,875
- Assignees
- 354
- Inventors
- 3,275
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 1 | 0 |
| 1984 | 0 | 0 |
| 1985 | 2 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 2 | 0 |
| 1989 | 3 | 0 |
| 1990 | 3 | 0 |
| 1991 | 2 | 0 |
| 1992 | 1 | 0 |
| 1993 | 0 | 0 |
| 1994 | 2 | 0 |
| 1995 | 3 | 0 |
| 1996 | 3 | 0 |
| 1997 | 1 | 0 |
| 1998 | 7 | 0 |
| 1999 | 5 | 0 |
| 2000 | 9 | 0 |
| 2001 | 7 | 8 |
| 2002 | 16 | 16 |
| 2003 | 16 | 18 |
| 2004 | 15 | 31 |
| 2005 | 23 | 32 |
| 2006 | 29 | 54 |
| 2007 | 20 | 61 |
| 2008 | 31 | 66 |
| 2009 | 39 | 73 |
| 2010 | 56 | 99 |
| 2011 | 70 | 126 |
| 2012 | 86 | 159 |
| 2013 | 135 | 122 |
| 2014 | 150 | 151 |
| 2015 | 137 | 168 |
| 2016 | 177 | 138 |
| 2017 | 141 | 135 |
| 2018 | 140 | 131 |
| 2019 | 121 | 123 |
| 2020 | 118 | 169 |
| 2021 | 141 | 169 |
| 2022 | 126 | 203 |
| 2023 | 139 | 212 |
| 2024 | 151 | 185 |
| 2025 | 140 | 126 |
| 2026 | 72 | 100 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Semiconductor device having a through contact connected to a buried pattern and penetrating a field insulation film and an etch stop layer6 Oct 2026US 12,757,719 B2Samsung Electronics Co., Ltd.
- Barrier layers for interconnects in bonded wafers6 Oct 2026US 12,757,721 B2United Microelectronics Corp.
- Edge structure of semiconductor wafer and manufacturing method thereof29 Sep 2026US 12,751,231 B2United Microelectronics Corp.
- Through-substrate-via in photosensitive module25 Aug 2026US 12,720,900 B2Semiconductor Components Industries, LLC
- Integrated circuit device25 Aug 2026US 12,721,135 B2Samsung Electronics Co., Ltd.
- Semiconductor device and methods of forming the same13 Aug 2026US 2026/0239629 A1Nanya Technology Corporation
- Chip stack structure and semiconductor package including the same13 Aug 2026US 2026/0239963 A1Samsung Electronics Co., Ltd.
- Semiconductor device and method of manufacturing semiconductor device6 Aug 2026US 2026/0231462 A1Sumitomo Electric Device Innovations, Inc.
- Integrated chip and method of manufacturing the same6 Aug 2026US 2026/0231554 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device6 Aug 2026US 2026/0231736 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices775US 7,157,787 B2Intel Corporation · 2007
- Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices528US 6,762,076 B2Intel Corporation · 2004
- Multi-dice chip scale semiconductor components and wafer level methods of fabrication456US 6,841,883 B1Micron Technology, Inc. · 2005
- TSV structures and methods for forming the same396US 8,803,316 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2014
- 3D IC method and device388US 7,485,968 B2Ziptronix, Inc. · 2009