H10P 76/40
Manufacture or treatment of masks on semiconductor bodies: of masks comprising inorganic
Official title: of masks comprising inorganic materials
H10P76/40 (Manufacture or treatment of masks on semiconductor bodies: of masks comprising inorganic) appears on 6,635 US grants and 6,739 published applications in this corpus.
Search patents in H10P- Granted patents
- 6,635
- Published applications
- 6,739
- Assignees
- 765
- Inventors
- 9,761
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 17 | 0 |
| 1977 | 28 | 0 |
| 1978 | 30 | 0 |
| 1979 | 29 | 0 |
| 1980 | 47 | 0 |
| 1981 | 57 | 0 |
| 1982 | 56 | 0 |
| 1983 | 49 | 0 |
| 1984 | 36 | 0 |
| 1985 | 36 | 0 |
| 1986 | 29 | 0 |
| 1987 | 43 | 0 |
| 1988 | 43 | 0 |
| 1989 | 39 | 0 |
| 1990 | 20 | 0 |
| 1991 | 28 | 0 |
| 1992 | 9 | 0 |
| 1993 | 18 | 0 |
| 1994 | 25 | 0 |
| 1995 | 19 | 0 |
| 1996 | 12 | 0 |
| 1997 | 21 | 0 |
| 1998 | 40 | 0 |
| 1999 | 50 | 0 |
| 2000 | 58 | 0 |
| 2001 | 81 | 23 |
| 2002 | 57 | 65 |
| 2003 | 64 | 69 |
| 2004 | 72 | 100 |
| 2005 | 72 | 113 |
| 2006 | 88 | 117 |
| 2007 | 70 | 161 |
| 2008 | 86 | 209 |
| 2009 | 110 | 252 |
| 2010 | 152 | 199 |
| 2011 | 193 | 174 |
| 2012 | 194 | 219 |
| 2013 | 198 | 201 |
| 2014 | 265 | 313 |
| 2015 | 307 | 393 |
| 2016 | 374 | 392 |
| 2017 | 391 | 372 |
| 2018 | 380 | 394 |
| 2019 | 412 | 474 |
| 2020 | 486 | 537 |
| 2021 | 370 | 428 |
| 2022 | 333 | 392 |
| 2023 | 273 | 329 |
| 2024 | 307 | 341 |
| 2025 | 293 | 299 |
| 2026 | 168 | 173 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Assembly structure including a plurality of spacers and method of manufacturing the same6 Oct 2026US 12,757,375 B2Nanya Technology Corporation
- Semiconductor device, semiconductor structure and method for fabricating semiconductor device and semiconductor structure using tilted etch process6 Oct 2026US 12,757,661 B2Nanya Technology Corporation
- Method of manufacturing a vertical semiconductor memory device using metal mask layers6 Oct 2026US 12,757,689 B2Kioxia Corporation
- Method of manufacturing memory device using self-aligned double patterning (SADP)6 Oct 2026US 12,757,690 B2Nanya Technology Corporation
- Method for fabricating semiconductor device29 Sep 2026US 12,751,222 B2Samsung Electronics Co., Ltd.
- Selective etch of a stack with a carbon containing mask8 Oct 2026US 2026/0314342 A1Lam Research Corporation
- Lithography method using photo mask8 Oct 2026US 2026/0314343 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Structure and Method for Deep Trench Capacitor with Reduced Deformation1 Oct 2026US 2026/0304797 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Method for fabricating nmos high-k metal gate and pmos high-k metal gate1 Oct 2026US 2026/0304883 A1Huahong Integrated Circuit(Chengdu) Corporation
- Redistribution layer metallic layout structure and method with warpage reduction1 Oct 2026US 2026/0305234 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Method of spacer patterning to form a target integrated circuit pattern3,272US 9,576,814 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2017
- Method for reducing, by a factor or 2.sup.-N, the minimum masking pitch of a photolithographic process1,059US 5,328,810 AMicron Technology, Inc. · 1994
- Method for integrated circuit patterning805US 9,184,054 B1Taiwan Semiconductor Manufacturing Company.Ltd · 2015
- Frequency doubling using spacer mask774US 7,807,578 B2APPLIED Materials.Inc. · 2010
- Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures742US 7,611,980 B2Micron Technology, Inc. · 2009