G11C 2013/0088
Write with the simultaneous writing of a plurality of cells
Official title: {Write with the simultaneous writing of a plurality of cells}
G11C2013/0088 (Write with the simultaneous writing of a plurality of cells) appears on 211 US grants and 234 published applications in this corpus.
Search patents in G11C- Granted patents
- 211
- Published applications
- 234
- Assignees
- 65
- Inventors
- 351
- Latest grant
- 9 Sep 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2005 | 0 | 1 |
| 2006 | 0 | 0 |
| 2007 | 1 | 0 |
| 2008 | 0 | 2 |
| 2009 | 1 | 6 |
| 2010 | 4 | 20 |
| 2011 | 10 | 12 |
| 2012 | 11 | 11 |
| 2013 | 14 | 15 |
| 2014 | 17 | 30 |
| 2015 | 21 | 15 |
| 2016 | 20 | 24 |
| 2017 | 25 | 14 |
| 2018 | 18 | 15 |
| 2019 | 10 | 15 |
| 2020 | 16 | 12 |
| 2021 | 8 | 10 |
| 2022 | 16 | 10 |
| 2023 | 6 | 7 |
| 2024 | 6 | 4 |
| 2025 | 7 | 5 |
| 2026 | 0 | 6 |
By publication year. 2026 runs to 8 Oct.
Recent patents
- Accessing memory cells in a vertical memory array9 Sep 2025US 12,412,626 B2Micron Technology, Inc.
- Cross-point memory device and method for converting and storing write data and associated parity to achieve uniform bit error rates5 Aug 2025US RE50,519 E1Samsung Electronics Co., Ltd.
- Forming method of resistive random-access memory array1 Jul 2025US 12,347,486 B2United Microelectronics Corp.
- Programming techniques for polarity-based memory cells6 May 2025US 12,293,789 B2Micron Technology, Inc.
- Systems and techniques for accessing multiple memory cells concurrently11 Mar 2025US 12,249,370 B2Micron Technology, Inc.
- Memory array27 Aug 2026US 2026/0253620 A1Xiamen Industrial Technology Research Institute Co., Ltd.
- Resistive random-access memory with hybrid bonding integration18 Jun 2026US 2026/0171151 A1Hefei Reliance Memory Limited
- Method of performing program operations in phase change memories, corresponding device and computer program product4 Jun 2026US 2026/0155176 A1STMicroelectronics International N. V.
- Resistive random-access memory structure and method21 May 2026US 2026/0141950 A1GLOBALFOUNDRIES U. S. Inc.
- Semiconductor device and writing method14 May 2026US 2026/0134901 A1Renesas Electronics Corporation
Most cited
By later US patents
- Resistive memory devices having a not-and (NAND) structure242US 8,107,276 B2International Business Machines Corporation · 2012
- Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a double-global-bit-line architecture40US 8,199,576 B2SanDisk 3D LLC · 2012
- Accessing memory cells in parallel in a cross-point array31US 9,312,005 B2Micron Technology, Inc. · 2016
- Structure and method for forming conductive path in resistive random-access memory device26US 8,593,854 B1Taiwan Semiconductor Manufacturing Company.Ltd · 2013
- Circuit and system for concurrently programming multiple bits of OTP memory devices26US 9,324,447 B22016