Semiconductor device and writing method
AssigneeRenesas Electronics Corporation
InventorsYohei SATO, Shota OKAYAMA, Yuichiro YAMAGUCHI, Koichi TAKEDA, Hirofumi HEBISHIMA, Takashi KAWANO
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AssigneeRenesas Electronics Corporation
InventorsYohei SATO, Shota OKAYAMA, Yuichiro YAMAGUCHI, Koichi TAKEDA, Hirofumi HEBISHIMA, Takashi KAWANO
Estimating the term…
A semiconductor device includes a plurality of data lines, a plurality of memory cells connected to the plurality of data lines, and a plurality of FF circuits corresponding to the plurality of data lines. The semiconductor device further includes a memory array circuit including an input circuit that is supplied with a high voltage during writing and writes data to the memory cell connected to the corresponding data line according to data held in the FF circuit. The semiconductor device further includes a memory controller that supplies a data string having a number of pieces of data corresponding to a number of FF circuits to the input circuit and causes the FF circuit to hold the data string. The memory controller includes a pop counter circuit that counts a number of pieces of inverted data included in the data string, and the memory controller divides the FF circuit into a plurality of regions based on counting by the pop counter circuit so that the number of FF circuits that store inverted data is equal to or less than a predetermined number. The input circuit is controlled to select the plurality of regions at different timings and simultaneously write data held in the FF circuits arranged in the selected regions.
A semiconductor device comprising:
A writing method comprising:
Dependencies are inferred from the claim text.