G11C 16/3418
Disturbance prevention or evaluation
Official title: {Disturbance prevention or evaluation; Refreshing of disturbed memory data}
G11C16/3418 (Disturbance prevention or evaluation) appears on 4,715 US grants and 4,847 published applications in this corpus.
Search patents in G11C- Granted patents
- 4,715
- Published applications
- 4,847
- Assignees
- 421
- Inventors
- 4,331
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 3 | 0 |
| 1978 | 1 | 0 |
| 1979 | 1 | 0 |
| 1980 | 1 | 0 |
| 1981 | 1 | 0 |
| 1982 | 3 | 0 |
| 1983 | 5 | 0 |
| 1984 | 3 | 0 |
| 1985 | 6 | 0 |
| 1986 | 2 | 0 |
| 1987 | 3 | 0 |
| 1988 | 3 | 0 |
| 1989 | 3 | 0 |
| 1990 | 5 | 0 |
| 1991 | 2 | 0 |
| 1992 | 3 | 0 |
| 1993 | 3 | 0 |
| 1994 | 5 | 0 |
| 1995 | 11 | 0 |
| 1996 | 14 | 0 |
| 1997 | 20 | 0 |
| 1998 | 28 | 0 |
| 1999 | 31 | 0 |
| 2000 | 33 | 0 |
| 2001 | 32 | 7 |
| 2002 | 23 | 33 |
| 2003 | 31 | 46 |
| 2004 | 50 | 56 |
| 2005 | 44 | 69 |
| 2006 | 57 | 88 |
| 2007 | 101 | 152 |
| 2008 | 127 | 232 |
| 2009 | 151 | 198 |
| 2010 | 170 | 180 |
| 2011 | 179 | 191 |
| 2012 | 194 | 205 |
| 2013 | 187 | 221 |
| 2014 | 253 | 266 |
| 2015 | 294 | 250 |
| 2016 | 300 | 241 |
| 2017 | 256 | 187 |
| 2018 | 219 | 191 |
| 2019 | 249 | 251 |
| 2020 | 273 | 267 |
| 2021 | 254 | 238 |
| 2022 | 238 | 290 |
| 2023 | 227 | 291 |
| 2024 | 285 | 274 |
| 2025 | 212 | 208 |
| 2026 | 119 | 215 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Cascade model for determining read level voltage offsets based on wordline group memory cells29 Sep 2026US 12,749,541 B2Micron Technology, Inc.
- Memory system including semiconductor memory and controller22 Sep 2026US 12,744,087 B2Kioxia Corporation
- Memory system performing read operation using read voltage15 Sep 2026US 12,738,324 B2Kioxia Corporation
- Operations on partially programmed erase blocks15 Sep 2026US 12,738,327 B2Micron Technology, Inc.
- Memory device, memory system, memory controller, and operation method15 Sep 2026US 12,738,328 B2Yangtze Memory Technologies Co., Ltd.
- Bias voltage control for sub-block groups in a memory device8 Oct 2026US 2026/0311766 A1Micron Technology, Inc.
- Alternative erase schemes for reliability-risk word lines8 Oct 2026US 2026/0311777 A1Micron Technology, Inc.
- Selective use of a word line monitoring procedure for reliability-risk word lines8 Oct 2026US 2026/0311782 A1Micron Technology, Inc.
- Read method of memory device and memory device therefore1 Oct 2026US 2026/0301845 A1Macronix International Co., Ltd.
- Accelerating program-erase cycles on memory devices24 Sep 2026US 2026/0288604 A1Micron Technology, Inc.
Most cited
By later US patents
- Multi-state memory1,008US 6,222,762 B1SanDisk Corporation · 2001
- High density non-volatile flash memory without adverse effects of electric field coupling between adjacent floating gates827US 5,867,429 ASanDisk Corporation · 1999
- Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states791US 6,522,580 B2SanDisk Corporation · 2003
- Variable programming of non-volatile memory725US 7,020,017 B2SanDisk Corporation · 2006
- Compensating for coupling during read operations of non-volatile memory657US 7,196,928 B2SanDisk Corporation · 2007