G06F 30/3953
Detailed
Official title: detailed
G06F30/3953 (Detailed) appears on 223 US grants and 291 published applications in this corpus.
Search patents in G06F- Granted patents
- 223
- Published applications
- 291
- Assignees
- 68
- Inventors
- 569
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2001 | 1 | 0 |
| 2002 | 0 | 3 |
| 2003 | 0 | 6 |
| 2004 | 3 | 3 |
| 2005 | 5 | 0 |
| 2006 | 3 | 1 |
| 2007 | 2 | 1 |
| 2008 | 1 | 0 |
| 2009 | 0 | 0 |
| 2010 | 0 | 0 |
| 2011 | 0 | 0 |
| 2012 | 0 | 1 |
| 2013 | 0 | 2 |
| 2014 | 3 | 1 |
| 2015 | 1 | 0 |
| 2016 | 1 | 2 |
| 2017 | 0 | 0 |
| 2018 | 1 | 1 |
| 2019 | 5 | 6 |
| 2020 | 19 | 18 |
| 2021 | 23 | 40 |
| 2022 | 27 | 47 |
| 2023 | 34 | 60 |
| 2024 | 37 | 38 |
| 2025 | 34 | 32 |
| 2026 | 23 | 29 |
By publication year. 2026 runs to 8 Oct.
Recent patents
- Methods and apparatus to automate a design including routing between dice6 Oct 2026US 12,755,080 B2Intel Corporation
- Method and device for designing pixel circuit, controller, and storage medium29 Sep 2026US 12,748,906 B2Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Method of implementing an integrated circuit having a narrow-width cell and a wider-width cell with same functionality4 Aug 2026US 12,699,831 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Multi-path routing in a network on chip4 Aug 2026US 12,699,832 B2Xilinx, Inc.
- Concurrently routing multiple partitions of an integrated circuit design23 Jun 2026US 12,664,347 B2D2S, Inc.
- Generating routes for an integrated circuit design with non-preferred direction wiring24 Sep 2026US 2026/0289065 A1D2S, Inc.
- Using pixel-based definition of an integrated circuit design to perform machine-trained routing17 Sep 2026US 2026/0278236 A1D2S, Inc.
- Eco base cell structure17 Sep 2026US 2026/0282557 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Design method of semiconductor structure27 Aug 2026US 2026/0255945 A1Powerchip Semiconductor Manufacturing Corporation
- Method and device with circuit design13 Aug 2026US 2026/0236662 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Method of designing a constraint-driven integrated circuit layout114US 6,230,304 B1Magma Design Automation, Inc. · 2001
- Method and apparatus for pre-computing routes for multiple wiring models32US 6,687,893 B2Cadence Design Systems, Inc. · 2004
- IC layout system having separate trial and detailed routing phases32US 6,782,520 B1Cadence Design Systems, Inc. · 2004
- Method and apparatus for producing sub-optimal routes for a net by generating fake configurations22US 6,738,960 B2Cadence Design Systems, Inc. · 2004
- Partition wire assignment for routing multi-partition circuit designs16US 11,238,206 B1Xilinx, Inc. · 2022