Partition wire assignment for routing multi-partition circuit designs
AssigneeXilinx, Inc.
InventorsSatish B. Sivaswamy, Nitin Deshmukh, Garik Mkrtchyan, Grigor S. Gasparyan
Life of this patent
Estimating the term…
Abstract
Performing partition wire assignment for routing a multi-partition circuit design can include performing, using computer hardware, a global assignment phase by clustering a plurality of super-long lines (SLLs) into a plurality of SLL bins, clustering loads of nets of a circuit design into a plurality of load clusters, and assigning the plurality of SLL bins to the plurality of load clusters. For each SLL bin, a detailed assignment phase can be performed wherein each net having a load cluster assigned to the SLL bin is assigned one or more particular SLLs of the SLL bin using the computer hardware.
Claims20
A method, comprising:
- performing, using computer hardware, a global assignment phase by clustering a plurality of super-long lines (SLLs) into a plurality of SLL bins, clustering loads of nets of a circuit design into a plurality of load clusters, and assigning the plurality of SLL bins to the plurality of load clusters;
- and
- for each SLL bin, performing a detailed assignment phase wherein each net having a load cluster assigned to the SLL bin is assigned one or more particular SLLs of the SLL bin using the computer hardware.
A system, comprising:
- a processor configured to initiate operations including:
- performing a global assignment phase by clustering a plurality of super-long lines (SLLs) into a plurality of SLL bins, clustering loads of nets of a circuit design into a plurality of load clusters, and assigning the plurality of SLL bins to the plurality of load clusters;
- and
- for each SLL bin, performing a detailed assignment phase wherein each net having a load cluster assigned to the SLL bin is assigned one or more particular SLLs of the SLL bin.
A computer program product, comprising:
- one or more computer readable storage media, and program instructions collectively stored on the one or more computer readable storage media, wherein the program instructions are executable by computer hardware to initiate operations including:
- performing a global assignment phase by clustering a plurality of super-long lines (SLLs) into a plurality of SLL bins, clustering loads of nets of a circuit design into a plurality of load clusters, and assigning the plurality of SLL bins to the plurality of load clusters;
- and
- for each SLL bin, performing a detailed assignment phase wherein each net having a load cluster assigned to the SLL bin is assigned one or more particular SLLs of the SLL bin.
Dependencies are inferred from the claim text.