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US 12,699,831 B2Granted
Method of implementing an integrated circuit having a narrow-width cell and a wider-width cell with same functionality
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsAnurag Verma, Meng-Kai Hsu, Chiwei Hu
Life of this patent
Estimating the term…
Abstract
An integrated circuit includes a first circuit cell having a first width and a second circuit cell having a second width that is wider than the first width by at least one contacted poly pitch. An equivalent circuit of the first circuit cell is the same as an equivalent circuit of the second circuit cell.
Claims20
An integrated circuit, comprising:
- a first circuit cell having a first width extending in a first direction;
- a second circuit cell having a second width that is wider than the first width by at least one Contacted Poly Pitch (CPP), wherein an equivalent circuit of the first circuit cell is the same as an equivalent circuit of the second circuit cell;
- a first connection pin and a second connection pin in a first metal layer and bounded between two vertical boundaries of the second circuit cell, wherein each of the first connection pin and the second connection pin has a length thereof extending in the first direction and a width thereof measured along a second direction, with the length larger than the width;
- a first conducting line and a second conducting line, each of which extending in the second direction in a second metal layer above the first metal layer;
- a first via connector directly connecting the first conducting line with the first connection pin;
- a second via connector directly connecting the second conducting line with the second connection pin;
- and
- a power grid line having a length thereof extending in the second direction in the second metal layer and passing across the second circuit cell, wherein the power grid line extends along the second direction between the first conducting line and the second conducting line.
5 more elements
An integrated circuit, comprising:
- a first circuit cell having a first width;
- a second circuit cell having a second width that is wider than the first width by at least one Contacted Poly Pitch (CPP);
- a first connection pin extending in a first direction in a first metal layer and bounded between two vertical boundaries of the second circuit cell, wherein the first connection pin has a length thereof extending in the first direction and a width thereof measured along a second direction, with the length larger than the width;
- a first conducting line extending in the second direction in a second metal layer above the first metal layer and intersecting the first connection pin of the second circuit cell, the first direction being perpendicular to the first direction;
- a power grid conducting line having a length thereof extending in the second direction in the second metal layer between the two vertical boundaries of the second circuit cell and passing across the second circuit cell, wherein the power grid conducting line is adjacent to and in parallel with the first conducting line;
- and
- wherein the first circuit cell and the second circuit cell have same circuit functions.
4 more elements
A method comprising:
- fabricating first-type active-region structures and second-type active-region structures, wherein each of first-type active-region structures and second-type active-region structures extends in a first direction;
- fabricating gate-conductors and terminal-conductors extending in a second direction that is perpendicular to the first direction;
- forming connection pins extending in the first direction in a first metal layer, wherein each of the connection pins has a length thereof extending in the first direction and a width thereof measured along the second direction, with the length larger than the width, wherein at least two connection pins are in a first circuit cell that has a first width and at least two connection pins are in a second circuit cell that has a second width, wherein the first circuit cell and the second circuit cell have same circuit functions, and wherein the second width is wider than the first width by at least one Contacted Poly Pitch (CPP);
- fabricating via-connectors in one or more layers of interlayer dielectrics covering the connection pins;
- and
- forming conducting lines extending in the second direction in a second metal layer overlying the interlayer dielectrics covering the connection pins, and wherein each of a first conducting line and a second conducting line is connected to, through one of the via-connectors, one of the connection pins which is bounded between two vertical boundaries of the second circuit cell;
- and
- forming a power grid conducting line having a length thereof extending in the second direction in the second metal layer and passing across the second circuit cell, wherein the power conducting grid line extends along the second direction between the first conducting line and the second conducting line.
5 more elements
Dependencies are inferred from the claim text.