G01R 31/318597
Jtag or boundary scan test of memory devices
Official title: {JTAG or boundary scan test of memory devices (other scan testing of memories G11C29/32)}
G01R31/318597 (Jtag or boundary scan test of memory devices) appears on 168 US grants and 168 published applications in this corpus.
Search patents in G01R- Granted patents
- 168
- Published applications
- 168
- Assignees
- 64
- Inventors
- 283
- Latest grant
- 8 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2005 | 0 | 2 |
| 2006 | 0 | 0 |
| 2007 | 2 | 0 |
| 2008 | 0 | 1 |
| 2009 | 1 | 2 |
| 2010 | 1 | 4 |
| 2011 | 3 | 3 |
| 2012 | 3 | 4 |
| 2013 | 6 | 5 |
| 2014 | 11 | 11 |
| 2015 | 12 | 10 |
| 2016 | 8 | 15 |
| 2017 | 11 | 7 |
| 2018 | 13 | 9 |
| 2019 | 10 | 14 |
| 2020 | 12 | 11 |
| 2021 | 13 | 17 |
| 2022 | 11 | 16 |
| 2023 | 13 | 13 |
| 2024 | 21 | 11 |
| 2025 | 13 | 7 |
| 2026 | 4 | 6 |
By publication year. 2026 runs to 8 Oct.
Recent patents
- State clearing of internal memory and flip-flops of a system using built-in test and scan circuitry8 Sep 2026US 12,730,940 B2Microsoft Technology Licensing, LLC
- Secure boot apparatus and method16 Jun 2026US 12,657,307 B2Huawei Technologies Co., Ltd.
- JTAG-based apparatus and method for input clock frequency measurement10 Mar 2026US 12,571,842 B2Xilinx, Inc.
- Systems and methods for scan chain interface for non-volatile storage bits13 Jan 2026US 12,525,272 B2Everspin Technologies, Inc.
- System access boundary scan via system sideband signal connections18 Nov 2025US 12,474,406 B2Micron Technology, Inc.
- Systems and methods for scan chain interface for non-volatile storage bits7 May 2026US 2026/0128072 A1Everspin Technologies, Inc.
- Scan Test Security for Semiconductor Devices5 Mar 2026US 2026/0063714 A1NVIDIA Corporation
- System access boundary scan via system sideband signal connections19 Feb 2026US 2026/0050034 A1Micron Technology, Inc.
- Jtag-based apparatus and method for input clock frequency measurement5 Feb 2026US 2026/0036624 A1Xilinx, Inc.
- Reset test system and system-on-chip including the same8 Jan 2026US 2026/0009848 A1Itda Semiconductor Co., Ltd.
Most cited
By later US patents
- Testing an embedded core24US 7,917,820 B1Xilinx, Inc. · 2011
- Method, system, and product for isolating memory system defects to a particular memory system component22US 7,305,595 B2International Business Machines Corporation · 2007
- JTAG circuit transferring data between devices on TCK terminals17US 7,493,535 B2Texas Instruments Incorporated · 2009
- JTAG circuit transferring data between devices on TMS terminals15US 7,284,170 B2Texas Instruments Incorporated · 2007
- IC TAP with dual port router and additional capture input15US 8,924,802 B2Texas Instruments Incorporated · 2014