JTAG-based apparatus and method for input clock frequency measurement
AssigneeXilinx, Inc.
InventorRandal M. Kuramoto
Life of this patent
Estimating the term…
Abstract
In an implementation, a method may include receiving an input clock at an input pin of a device, the device having a Joint Test Action Group (JTAG) test access port (TAP). The method may also include counting a first number of cycles of a reference clock using a first counter. The method may furthermore include simultaneously counting a second number of cycles of the input clock received at the input pin using a second counter. The method may in addition include calculating a frequency of the input clock based on the counted first number of cycles of the reference clock, the counted second number of cycles of the input clock, and a frequency of the reference clock.
Claims20
A method, comprising:
- receiving an input clock at an input pin of a device, the device comprising a Joint Test Action Group (JTAG) test access port (TAP);
- counting a first number of cycles of a reference clock using a first counter;
- simultaneously counting a second number of cycles of the input clock received at the input pin using a second counter;
- and
- calculating a frequency of the input clock based on the counted first number of cycles of the reference clock, the counted second number of cycles of the input clock, and a frequency of the reference clock.
A device, comprising:
- a Joint Test Action Group (JTAG) test access port (TAP);
- an input pin configured to receive an input clock signal;
- at least one counter configured to count cycles of the input clock signal;
- and
- JTAG TAP logic configured to:
- control a clock frequency measurement process involving the at least one counter and the input clock signal, and
- send a count result from the at least one counter through the JTAG TAP for external calculation of an input clock frequency.
A system, comprising:
- a device comprising:
- a Joint Test Action Group (JTAG) test access port (TAP),
- an input pin configured to receive an input clock signal, and
- a device counter configured to count a number of input clock cycles;
- a JTAG controller external to the device, the JTAG controller comprising:
- a reference clock,
- a JTAG counter configured to count a number of reference clock cycles, and
- a controller configured to:
- control a clock frequency measurement process involving the JTAG counter and the device counter,
- retrieve a count value from the JTAG counter and the device counter, and
- calculate an input clock frequency based on the retrieved count value and a frequency of the reference clock.
Dependencies are inferred from the claim text.