G01R 31/31712
Input or output aspects
Official title: {Input or output aspects}
G01R31/31712 (Input or output aspects) appears on 1,274 US grants and 1,196 published applications in this corpus.
Search patents in G01R- Granted patents
- 1,274
- Published applications
- 1,196
- Assignees
- 376
- Inventors
- 2,132
- Latest grant
- 15 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 1 | 0 |
| 1981 | 0 | 0 |
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 1 | 0 |
| 1985 | 3 | 0 |
| 1986 | 1 | 0 |
| 1987 | 12 | 0 |
| 1988 | 1 | 0 |
| 1989 | 3 | 0 |
| 1990 | 3 | 0 |
| 1991 | 3 | 0 |
| 1992 | 3 | 0 |
| 1993 | 3 | 0 |
| 1994 | 7 | 0 |
| 1995 | 6 | 0 |
| 1996 | 4 | 0 |
| 1997 | 16 | 0 |
| 1998 | 15 | 0 |
| 1999 | 18 | 0 |
| 2000 | 9 | 0 |
| 2001 | 21 | 9 |
| 2002 | 23 | 25 |
| 2003 | 15 | 35 |
| 2004 | 35 | 55 |
| 2005 | 40 | 66 |
| 2006 | 54 | 62 |
| 2007 | 68 | 87 |
| 2008 | 66 | 59 |
| 2009 | 68 | 66 |
| 2010 | 81 | 58 |
| 2011 | 63 | 56 |
| 2012 | 43 | 32 |
| 2013 | 45 | 41 |
| 2014 | 40 | 35 |
| 2015 | 38 | 36 |
| 2016 | 40 | 43 |
| 2017 | 42 | 37 |
| 2018 | 35 | 40 |
| 2019 | 38 | 43 |
| 2020 | 46 | 43 |
| 2021 | 45 | 56 |
| 2022 | 57 | 51 |
| 2023 | 45 | 54 |
| 2024 | 57 | 42 |
| 2025 | 42 | 37 |
| 2026 | 16 | 28 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Chip testing method and apparatus15 Sep 2026US 12,736,583 B2Xiamen Industrial Technology Research Institute Co., Ltd.
- Testing circuit for testing electrical devices and device under test8 Sep 2026US 12,730,147 B2Winbond Electronics Corp.
- Semiconductor test apparatus and power supply method thereof1 Sep 2026US 12,724,067 B2Samsung Electronics Co., Ltd.
- Flexible test instruction set architecture4 Aug 2026US 12,699,131 B2Signature IP Corporation
- Method, device, and system for detecting fuse configuration for trimming circuit21 Jul 2026US 12,687,577 B2Samsung Electronics Co., Ltd.
- Wrapper Cell Design and Built-In Self-Test Architecture for 3DIC Test and Diagnosis8 Oct 2026US 2026/0309778 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Multi-phase synchronized method for lane margining1 Oct 2026US 2026/0299021 A1SK hynix Inc.
- Method and system for testing three-dimensional semiconductor devices27 Aug 2026US 2026/0251710 A1Marvell Asia Pte Ltd
- Portable device and method for performing multiple tests on an electronic circuit20 Aug 2026US 2026/0243825 A1
- Modular data center installation, testing, measurement, and maintenance device6 Aug 2026US 2026/0227440 A1Viavi Solutions Inc.
Most cited
By later US patents
- Full wafer integrated circuit testing device306US 5,070,297 ATexas Instruments Incorporated · 1991
- IC card with dual level power supply interface and method for operating the IC card202US 5,490,117 ASeiko Epson Corporation · 1996
- Memory circuit for use in hardware emulation system197US 6,732,068 B2Quickturn Design Systems, Inc. · 2004
- Method and apparatus for evaluating and optimizing a signaling system146US 7,490,275 B2Rambus Inc. · 2009
- Method and apparatus for tracing hardware states using dynamically reconfigurable test circuits134US 6,542,844 B1International Business Machines Corporation · 2003