US 12,730,147 B2Granted

Testing circuit for testing electrical devices and device under test

AssigneeWinbond Electronics Corp.

InventorsLih-Wei Lin, Chia-Fu Liang

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Abstract

A testing circuit for testing a plurality of electrical devices is provided. The testing circuit includes a first pad and a plurality of delay circuits. The first pad is disposed on a scribe line of a substrate. The first pad is configured to receive a trigger signal to trigger the electrical devices to sequentially perform a testing operation. The electrical devices are disposed on the substrate. The delay circuits are disposed on the scribe line of the substrate. The delay circuits are electrically connected to the first pad. The delay circuits are configured to delay the trigger signal and output the delayed trigger signal to the corresponding electrical devices. The electrical devices sequentially perform the testing operation according to the delayed trigger signal to respectively output a testing result.

Claims20

Dependent claims

A testing circuit, configured to test a plurality of electrical devices, wherein the testing circuit comprises:

a first pad, disposed on a scribe line of a substrate, and configured to receive a trigger signal to trigger the electrical devices to sequentially perform a testing operation, wherein the electrical devices are disposed on the substrate;
and
a plurality of delay circuits, coupled in series, disposed on the scribe line of the substrate, and electrically connected to the first pad, wherein the delay circuits are configured to delay the trigger signal in sequence to respectively output a plurality of delayed trigger signals to the corresponding electrical devices, and the electrical devices sequentially perform the testing operation according to the delayed trigger signals so as to respectively output a plurality of testing results,
wherein each of the electrical devices comprises:
a storage circuit, being configured to receive the corresponding delayed trigger signal and store a latency counter value of the electrical device, wherein the latency counter value is obtained by adding a corresponding reference counter value with a delayed time period of corresponding delayed trigger signal,
wherein each of the electrical devices determines a time point for outputting each of the testing results according to the latency counter value.

3 more elements

A device under test, comprising:

a plurality of electrical devices, disposed on a substrate;
and
a testing circuit, comprising:
a first pad, disposed on a scribe line of the substrate, and configured to receive a trigger signal to trigger the electrical devices to sequentially perform a testing operation, wherein the electrical devices are disposed on the substrate;
and
a plurality of delay circuits, coupled in series, disposed on the scribe line of the substrate, and electrically connected to the first pad, wherein the delay circuits are configured to delay the trigger signal in sequence to respectively output a plurality of delayed trigger signals to the corresponding electrical devices,
wherein the electrical devices sequentially perform the testing operation according to the delayed trigger signals so as to respectively output a plurality of testing results,
wherein each of the electrical devices comprises:
a storage circuit, being configured to receive the corresponding delayed trigger signal and store a latency counter value of the electrical device, wherein the latency counter value is obtained by adding a corresponding reference counter value with a delayed time period of corresponding delayed trigger signal,
wherein each of the electrical devices determines a time point for outputting the testing result according to the latency counter value.

7 more elements

Dependencies are inferred from the claim text.