G01R 31/31716
Testing of input or output with loop-back
Official title: {Testing of input or output with loop-back}
G01R31/31716 (Testing of input or output with loop-back) appears on 220 US grants and 216 published applications in this corpus.
Search patents in G01R- Granted patents
- 220
- Published applications
- 216
- Assignees
- 119
- Inventors
- 477
- Latest grant
- 21 Jul 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1985 | 1 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 1 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 1 | 0 |
| 1997 | 3 | 0 |
| 1998 | 4 | 0 |
| 1999 | 1 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 2 | 4 |
| 2003 | 3 | 5 |
| 2004 | 2 | 11 |
| 2005 | 6 | 18 |
| 2006 | 17 | 12 |
| 2007 | 13 | 25 |
| 2008 | 20 | 11 |
| 2009 | 10 | 9 |
| 2010 | 16 | 10 |
| 2011 | 10 | 10 |
| 2012 | 5 | 7 |
| 2013 | 10 | 6 |
| 2014 | 12 | 7 |
| 2015 | 7 | 5 |
| 2016 | 8 | 9 |
| 2017 | 7 | 4 |
| 2018 | 5 | 5 |
| 2019 | 7 | 11 |
| 2020 | 4 | 7 |
| 2021 | 11 | 8 |
| 2022 | 8 | 6 |
| 2023 | 8 | 10 |
| 2024 | 8 | 7 |
| 2025 | 7 | 5 |
| 2026 | 3 | 4 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Wrapper cell design and built-in self-test architecture for 3DIC test and diagnosis21 Jul 2026US 12,687,578 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Over the air (OTA) testing of an antenna in package (AiP) device in radiating near field using a characterizing device and automated test equipment7 Apr 2026US 12,596,143 B2Advantest Corporation
- Functional safety mechanisms for input/output (IO) cells13 Jan 2026US 12,524,589 B2Synopsys, Inc.
- Low overhead loop back test for high speed transmitter21 Oct 2025US 12,449,478 B2STMicroelectronics International N. V.
- Stacked integrated circuit device29 Jul 2025US 12,374,657 B2Graphcore Limited
- Wrapper Cell Design and Built-In Self-Test Architecture for 3DIC Test and Diagnosis8 Oct 2026US 2026/0309778 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Method and system for testing three-dimensional semiconductor devices27 Aug 2026US 2026/0251710 A1Marvell Asia Pte Ltd
- Stacked semiconductor apparatus, method of detecting fault, and method of repairing fault2 Apr 2026US 2026/0096480 A1Electronics and Telecommunications Research Institute
- Probe card for loopback test, probe head thereof, probe system, testing method and tested device8 Jan 2026US 2026/0009822 A1Mpi Corporation
- Experiment-in-the-loop system for fast and effective tuning of active vibration controllers4 Sep 2025US 2025/0277851 A1Technology Innovation Institute - Sole Proprietorship LLC
Most cited
By later US patents
- Method and apparatus for evaluating and optimizing a signaling system146US 7,490,275 B2Rambus Inc. · 2009
- Method and apparatus for buffer self-test and characterization118US 5,621,739 AIntel Corporation · 1997
- Constraint driven insertion of scan logic for implementing design for test within an integrated circuit design98US 5,903,466 ASynopsys, Inc. · 1999
- Built-in self-test (BIST) circuit79US 5,230,000 AAT&T Bell Laboratories · 1993
- Through-core self-test with multiple loopbacks76US 7,346,819 B2Rambus Inc. · 2008