Method and apparatus for buffer self-test and characterization

A buffer circuit comprising:

• a first output circuit coupled to drive a value from a data input node to a first interface node;
• a second output circuit coupled to drive a strobe from a strobe input node to a second interface node;
• a latching circuit coupled to capture the value responsive to the strobe;
• an adjustable delay circuit coupled to delay the strobe before the strobe reaches the latching circuit.

An integrated circuit comprising:

• a test control circuit having a data input, a control input, a data output, and a control bus;
• a strobe buffer which is coupled to the control bus and which generates a strobe signal in response to a signal received from the test control circuit;
• an adjustable delay circuit which is coupled to receive the strobe signal, and which generates a delayed strobe signal;
• a data scan cell, coupled to the control bus, serially coupled to the data input and the data output of the test control circuit, and coupled to an input circuit to capture a data value latched by the input circuit responsive to the delayed strobe signal.

A method for self-testing a buffer circuit, comprising the steps of:

• (a) setting a strobe delay;
• (b) driving a data signal representing a data value;
• (c) generating a delayed strobe signal according to the strobe delay;
• (d) sampling a sampled value of the data signal using the delayed strobe signal;
• (e) testing whether the sampled value corresponds to the data value.