H10W 46/607
Located on parts of packages
Official title: {Located on parts of packages, e.g. on encapsulations or on package substrates}
H10W46/607 (Located on parts of packages) appears on 1,104 US grants and 1,385 published applications in this corpus.
Search patents in H10W- Granted patents
- 1,104
- Published applications
- 1,385
- Assignees
- 379
- Inventors
- 2,439
- Latest grant
- 25 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1981 | 2 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 1 | 0 |
| 1986 | 1 | 0 |
| 1987 | 2 | 0 |
| 1988 | 2 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 2 | 0 |
| 1992 | 2 | 0 |
| 1993 | 1 | 0 |
| 1994 | 2 | 0 |
| 1995 | 2 | 0 |
| 1996 | 3 | 0 |
| 1997 | 4 | 0 |
| 1998 | 4 | 0 |
| 1999 | 6 | 0 |
| 2000 | 8 | 0 |
| 2001 | 7 | 6 |
| 2002 | 12 | 15 |
| 2003 | 13 | 20 |
| 2004 | 16 | 27 |
| 2005 | 18 | 24 |
| 2006 | 16 | 29 |
| 2007 | 11 | 19 |
| 2008 | 11 | 25 |
| 2009 | 17 | 28 |
| 2010 | 21 | 28 |
| 2011 | 30 | 34 |
| 2012 | 16 | 32 |
| 2013 | 30 | 44 |
| 2014 | 36 | 54 |
| 2015 | 49 | 79 |
| 2016 | 74 | 109 |
| 2017 | 84 | 90 |
| 2018 | 77 | 83 |
| 2019 | 79 | 85 |
| 2020 | 61 | 80 |
| 2021 | 72 | 91 |
| 2022 | 70 | 87 |
| 2023 | 58 | 88 |
| 2024 | 79 | 101 |
| 2025 | 67 | 70 |
| 2026 | 38 | 37 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Method of forming ferroelectric chiplet in a multi-dimensional packaging with I/O switch embedded in a substrate or interposer25 Aug 2026US 12,717,479 B2Kepler Computing Inc.
- Self-alignment of glass core halves using protruded bumps25 Aug 2026US 12,721,193 B2Intel Corporation
- First chip and wafer bonding method and chip stacking structure18 Aug 2026US 12,713,934 B2Wuhan Xinxin Semiconductor Manufacturing Co., Ltd.
- Substrate barcode readability enhancement structures and method11 Aug 2026US 12,707,984 B2Infineon Technologies AG
- Electronic component device4 Aug 2026US 12,701,815 B2Olympus Medical Systems Corp.
- Semiconductor package with alignment marks1 Oct 2026US 2026/0305371 A1Samsung Electronics Co., Ltd.
- Display device and method of manufacturing the same24 Sep 2026US 2026/0293498 A1Samsung Display Co., Ltd.
- Semiconductor package17 Sep 2026US 2026/0282939 A1Samsung Electronics Co., Ltd.
- Semiconductor package and method for fabricating the same13 Aug 2026US 2026/0239993 A1Samsung Electronics Co., Ltd.
- Interposer substrate and semiconductor package including the same13 Aug 2026US 2026/0239994 A1Samsung Electronics Co., Ltd.
Most cited
By later US patents
- Semiconductor package and method thereof328US 5,776,798 AMotorola, Inc. · 1998
- Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices269US 7,749,882 B2Micron Technology, Inc. · 2010
- Integrated circuit package including lead frame with electrically isolated alignment feature184US 6,246,108 B1Micron Technology, Inc. · 2001
- Integrated circuit package alignment feature169US 6,048,744 AMicron Technology, Inc. · 2000
- System for performing bonding a first substrate to a second substrate155US 8,220,140 B1Western Digital (Fremont), LLC · 2012