Interposer substrate and semiconductor package including the same

An interposer substrate comprising:

• a base substrate having a first surface and a second surface which are opposite to each other;
• a through via that penetrates the base substrate;
• dummy vias penetrating the base substrate and providing an identification mark on the second surface of the base substrate;
• a wiring structure including a wiring layer disposed on the first surface of the base substrate and electrically connected to the through via, an insulation layer covering the wiring layer, and a first conductive pad disposed on the insulation layer and electrically connected to the wiring layer;
• and
• a second conductive pad disposed on the second surface of the base substrate and electrically connected to the through via;
• wherein the dummy vias are disposed outside of the through via, the wiring layer, the first conductive pad and the second conductive pad in a plan view, and electrically insulated from the through via, the wiring layer, the first conductive pad and the second conductive pad.

A semiconductor package comprising:

• an interposer substrate;
• and
• semiconductor chips disposed on the interposer substrate and electrically connected to the interposer substrate;
• wherein the interposer substrate comprises:
• a base substrate having a first surface and a second surface which are opposite to each other;
• a through via that penetrates the base substrate;
• dummy vias penetrating the base substrate and providing an identification mark on the second surface of the base substrate;
• a wiring structure disposed on the first surface of the base substrate and electrically connected to the through via;
• and
• a conductive pad disposed on the second surface of the base substrate and electrically connected to the through via;
• and wherein the semiconductor chips are disposed on the wiring structure of the interposer substrate.