H10W 20/0375
Comprising multiple stacked thin barrier, adhesion or liner layers not being formed
Official title: {comprising multiple stacked thin barrier, adhesion or liner layers not being formed in openings in dielectrics}
H10W20/0375 (Comprising multiple stacked thin barrier, adhesion or liner layers not being formed) appears on 155 US grants and 155 published applications in this corpus.
Search patents in H10W- Granted patents
- 155
- Published applications
- 155
- Assignees
- 69
- Inventors
- 353
- Latest grant
- 25 Nov 2025
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1987 | 1 | 0 |
| 1988 | 1 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 1 | 0 |
| 1994 | 1 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 1 | 0 |
| 1998 | 2 | 0 |
| 1999 | 2 | 0 |
| 2000 | 8 | 0 |
| 2001 | 9 | 5 |
| 2002 | 14 | 20 |
| 2003 | 7 | 14 |
| 2004 | 17 | 12 |
| 2005 | 8 | 17 |
| 2006 | 18 | 14 |
| 2007 | 7 | 6 |
| 2008 | 1 | 11 |
| 2009 | 6 | 2 |
| 2010 | 2 | 7 |
| 2011 | 10 | 3 |
| 2012 | 5 | 6 |
| 2013 | 3 | 0 |
| 2014 | 4 | 2 |
| 2015 | 1 | 4 |
| 2016 | 5 | 2 |
| 2017 | 2 | 2 |
| 2018 | 1 | 2 |
| 2019 | 2 | 3 |
| 2020 | 1 | 3 |
| 2021 | 1 | 2 |
| 2022 | 5 | 6 |
| 2023 | 2 | 7 |
| 2024 | 4 | 2 |
| 2025 | 3 | 3 |
By publication year. Applications have been published since 2001.
Recent patents
- Subtractively patterned interconnect structures for integrated circuits25 Nov 2025US 12,482,744 B2Intel Corporation
- Semiconductor devices having a wiring provided with a protective layer11 Nov 2025US 12,469,779 B2Samsung Electronics Co., Ltd.
- Nanowire-based interconnects for sub-millimeter wave integrated circuit applications18 Mar 2025US 12,255,108 B2Regents of the University of Minnesota
- Semiconductor structure with wraparound backside amorphous layer19 Nov 2024US 12,148,805 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Subtractively patterned interconnect structures for integrated circuits2 Jul 2024US 12,027,458 B2Intel Corporation
- Graphene-clad metal interconnect27 Nov 2025US 2025/0364418 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Hybrid interconnect structure with topological conductor interface layer25 Sep 2025US 2025/0300078 A1International Business Machines Corporation
- Semiconductor structure with wraparound backside amorphous layer2 Jan 2025US 2025/0006807 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device and method for fabricating the same26 Dec 2024US 2024/0429093 A1United Microelectronics Corp.
- Subtractively patterned interconnect structures for integrated circuits12 Sep 2024US 2024/0304543 A1Intel Corporation
Most cited
By later US patents
- Method of modifying source chemicals in an ald process98US 6,767,582 B1ASM International N.V. · 2004
- Method of forming amorphous conducting diffusion barriers81US 6,194,310 B1Sharp Laboratories of America, Inc. · 2001
- Local interconnect comprising titanium nitride barrier layer74US 5,847,463 AMicron Technology, Inc. · 1998
- Cyclical deposition of a variable content titanium silicon nitride layer67US 6,720,027 B2APPLIED Materials.Inc. · 2004
- Multilayered copper structure for improving adhesion property57US 6,777,331 B2Simplus Systems Corporation · 2004