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US 2025/0300078 A1Published application
Hybrid interconnect structure with topological conductor interface layer
AssigneeInternational Business Machines Corporation
InventorsChing-Tzu Chen, Takeshi Nogami
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Abstract
Embodiments of present invention provide a semiconductor structure. The semiconductor structure includes a non-topological conductor core, a topological conductor interface layer at least partially surrounding the non-topological conductor core, and a dielectric layer at least partially surrounding the topological conductor interface layer. Methods of forming the same is also provided.
Claims20
A semiconductor structure, the semiconductor structure comprising:
- a non-topological conductor core;
- a topological conductor interface layer at least partially surrounding the non-topological conductor core;
- and
- a dielectric layer at least partially surrounding the topological conductor interface layer.
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A method of forming a semiconductor structure, the method comprising:
- forming a trench within a substrate;
- depositing a topological conductor interface layer conformally along the trench, thereby creating a remainder of the trench surrounded by the topological conductor interface layer;
- filling the remainder of the trench with a non-topological conductor core;
- and
- capping the substrate with a dielectric layer.
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A method of forming a semiconductor structure, the method comprising:
- etching a non-topological conductor layer deposited on a substrate, thereby forming a non-topological conductor core;
- selectively forming a topological conductor interface layer on a top of and on sidewalls of the non-topological conductor core;
- and
- capping the topological conductor interface layer with a dielectric capping layer.
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Dependencies are inferred from the claim text.