H10D 64/035
Comprising conductor-insulator-conductor-insulator-semiconductor structures
Official title: {comprising conductor-insulator-conductor-insulator-semiconductor structures}
H10D64/035 (Comprising conductor-insulator-conductor-insulator-semiconductor structures) appears on 4,907 US grants and 5,016 published applications in this corpus.
Search patents in H10D- Granted patents
- 4,907
- Published applications
- 5,016
- Assignees
- 591
- Inventors
- 5,729
- Latest grant
- 1 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 2 | 0 |
| 1977 | 1 | 0 |
| 1978 | 1 | 0 |
| 1979 | 3 | 0 |
| 1980 | 3 | 0 |
| 1981 | 5 | 0 |
| 1982 | 2 | 0 |
| 1983 | 9 | 0 |
| 1984 | 4 | 0 |
| 1985 | 1 | 0 |
| 1986 | 3 | 0 |
| 1987 | 9 | 0 |
| 1988 | 14 | 0 |
| 1989 | 16 | 0 |
| 1990 | 12 | 0 |
| 1991 | 26 | 0 |
| 1992 | 27 | 0 |
| 1993 | 25 | 0 |
| 1994 | 16 | 0 |
| 1995 | 16 | 0 |
| 1996 | 14 | 0 |
| 1997 | 9 | 0 |
| 1998 | 22 | 0 |
| 1999 | 42 | 0 |
| 2000 | 88 | 0 |
| 2001 | 139 | 49 |
| 2002 | 141 | 161 |
| 2003 | 175 | 165 |
| 2004 | 184 | 239 |
| 2005 | 162 | 243 |
| 2006 | 183 | 304 |
| 2007 | 190 | 299 |
| 2008 | 160 | 313 |
| 2009 | 194 | 290 |
| 2010 | 217 | 197 |
| 2011 | 224 | 211 |
| 2012 | 190 | 176 |
| 2013 | 198 | 221 |
| 2014 | 236 | 244 |
| 2015 | 250 | 309 |
| 2016 | 289 | 263 |
| 2017 | 244 | 183 |
| 2018 | 197 | 150 |
| 2019 | 157 | 152 |
| 2020 | 164 | 165 |
| 2021 | 154 | 169 |
| 2022 | 111 | 156 |
| 2023 | 136 | 147 |
| 2024 | 110 | 101 |
| 2025 | 94 | 68 |
| 2026 | 38 | 41 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Non-volatile memory cell with ONO compound insulation layer between floating and control gates and a method of fabrication1 Sep 2026US 12,727,159 B2Silicon Storage Technology, Inc.
- Non-volatile memory device1 Sep 2026US 12,727,204 B2Iotmemory Technology Inc.
- Photo mask and lithography method using the same25 Aug 2026US 12,721,115 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Engineered dielectric profile for high aspect-ratio 3D NAND structures18 Aug 2026US 12,713,902 B2Intel NDTM US LLC
- Non-volatile memory device and method for manufacturing the same4 Aug 2026US 12,701,750 B2Iotmemory Technology Inc.
- Lithography method using photo mask8 Oct 2026US 2026/0314343 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device and electronic system including the same1 Oct 2026US 2026/0304759 A1Samsung Electronics Co., Ltd.
- Method for manufacturing non-volatile memory device24 Sep 2026US 2026/0293217 A1Iotmemory Technology Inc.
- Semiconductor device27 Aug 2026US 2026/0255604 A1Semiconductor Energy Laboratory Co.Ltd.
- NOR Memory Cell with Floating Gate30 Jul 2026US 2026/0221196 A1Greenliant IP LLC
Most cited
By later US patents
- Lanthanide oxide / hafnium oxide dielectric layers627US 7,192,824 B2Micron Technology, Inc. · 2007
- Atomic layer deposited dielectric layers621US 7,192,892 B2Micron Technology, Inc. · 2007
- Lanthanide oxide / hafnium oxide dielectric layers601US 7,312,494 B2Micron Technology, Inc. · 2007
- Electronic apparatus with deposited dielectric layers586US 7,405,454 B2Micron Technology, Inc. · 2008
- Flash EEPROM memory systems having multistate storage cells579US 5,043,940 A1991