H10D 62/118
Nanostructure semiconductor bodies
Official title: {Nanostructure semiconductor bodies}
H10D62/118 (Nanostructure semiconductor bodies) appears on 8,934 US grants and 14,003 published applications in this corpus.
Search patents in H10D- Granted patents
- 8,934
- Published applications
- 14,003
- Assignees
- 913
- Inventors
- 9,445
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1994 | 1 | 0 |
| 1995 | 1 | 0 |
| 1996 | 0 | 0 |
| 1997 | 1 | 0 |
| 1998 | 0 | 0 |
| 1999 | 2 | 0 |
| 2000 | 1 | 0 |
| 2001 | 1 | 2 |
| 2002 | 3 | 7 |
| 2003 | 4 | 8 |
| 2004 | 8 | 26 |
| 2005 | 15 | 65 |
| 2006 | 27 | 76 |
| 2007 | 38 | 118 |
| 2008 | 49 | 142 |
| 2009 | 75 | 137 |
| 2010 | 121 | 177 |
| 2011 | 138 | 211 |
| 2012 | 164 | 175 |
| 2013 | 182 | 183 |
| 2014 | 208 | 303 |
| 2015 | 258 | 371 |
| 2016 | 379 | 417 |
| 2017 | 451 | 479 |
| 2018 | 447 | 490 |
| 2019 | 527 | 545 |
| 2020 | 556 | 760 |
| 2021 | 616 | 878 |
| 2022 | 729 | 1302 |
| 2023 | 752 | 1753 |
| 2024 | 954 | 1880 |
| 2025 | 1255 | 2250 |
| 2026 | 971 | 1248 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Semiconductor memory devices with dielectric fin structures6 Oct 2026US 12,755,790 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Selective deposition of gate dielectric layer of semiconductor device and the semiconductor device manufactured thereby6 Oct 2026US 12,757,424 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Conductive bridge through dielectric wall between source or drain contacts6 Oct 2026US 12,757,439 B2Intel Corporation
- Semiconductor structure and method for forming the same6 Oct 2026US 12,757,440 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Contact formation with staggered gate patterning6 Oct 2026US 12,757,441 B2International Business Machines Corporation
- Semiconductor structure and method for manufacturing the same8 Oct 2026US 2026/0313867 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Multi-channel ferroelectric memory structure8 Oct 2026US 2026/0313908 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device and manufacturing method thereof8 Oct 2026US 2026/0313928 A1National Taiwan University
- Multi-gate device fabrication and structures thereof8 Oct 2026US 2026/0313936 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor structure and method for forming the same8 Oct 2026US 2026/0313940 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- FINFETs with wrap-around silicide and method forming the same1,436US 9,608,116 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2017
- Vertical gate all around (VGAA) transistors and methods of forming the same1,029US 9,502,265 B1Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Vertical gate all around (VGAA) devices and methods of manufacturing the same987US 9,536,738 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2017
- Methods and devices for fabricating and assembling printable semiconductor elements883US 7,622,367 B1The Board of Trustees of the University of Illinois · 2009
- Self-aligned wrapped-around structure876US 9,209,247 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2015