G11C 29/10
Test algorithms
Official title: Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns
G11C29/10 (Test algorithms) appears on 693 US grants and 574 published applications in this corpus.
Search patents in G11C- Granted patents
- 693
- Published applications
- 574
- Assignees
- 252
- Inventors
- 1,511
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 1 | 0 |
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 2 | 0 |
| 1981 | 2 | 0 |
| 1982 | 1 | 0 |
| 1983 | 0 | 0 |
| 1984 | 2 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 2 | 0 |
| 1988 | 4 | 0 |
| 1989 | 3 | 0 |
| 1990 | 2 | 0 |
| 1991 | 0 | 0 |
| 1992 | 2 | 0 |
| 1993 | 4 | 0 |
| 1994 | 8 | 0 |
| 1995 | 11 | 0 |
| 1996 | 20 | 0 |
| 1997 | 20 | 0 |
| 1998 | 18 | 0 |
| 1999 | 24 | 0 |
| 2000 | 12 | 0 |
| 2001 | 9 | 3 |
| 2002 | 10 | 13 |
| 2003 | 14 | 8 |
| 2004 | 6 | 9 |
| 2005 | 8 | 6 |
| 2006 | 12 | 18 |
| 2007 | 5 | 8 |
| 2008 | 15 | 8 |
| 2009 | 7 | 11 |
| 2010 | 6 | 7 |
| 2011 | 9 | 7 |
| 2012 | 10 | 16 |
| 2013 | 16 | 16 |
| 2014 | 18 | 24 |
| 2015 | 23 | 33 |
| 2016 | 24 | 8 |
| 2017 | 22 | 18 |
| 2018 | 11 | 19 |
| 2019 | 27 | 39 |
| 2020 | 38 | 22 |
| 2021 | 32 | 44 |
| 2022 | 64 | 83 |
| 2023 | 53 | 47 |
| 2024 | 51 | 46 |
| 2025 | 36 | 34 |
| 2026 | 27 | 27 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Image display device29 Sep 2026US 12,749,550 B2LG Electronics Inc.
- Semiconductor memory device, controller, memory system and method of operating the same22 Sep 2026US 12,744,102 B2SK hynix Inc.
- Memory device including damage detection circuit and test system including the memory device11 Aug 2026US 12,706,171 B2Samsung Electronics Co., Ltd.
- Faster method to prevent hybrid single level cell defects in system11 Aug 2026US 12,706,172 B2SanDisk Technologies LLC
- Memory device28 Jul 2026US 12,694,937 B2Samsung Electronics Co., Ltd.
- Reading and Writing Device Under Test Register Values8 Oct 2026US 2026/0311789 A1National Instruments Corporation
- Error scan frequency adjustments1 Oct 2026US 2026/0301835 A1Micron Technology, Inc.
- Scheduling scan operations in memory sub-systems1 Oct 2026US 2026/0301836 A1Micron Technology, Inc.
- Neural processing unit configured for non-disruptive runtime testing1 Oct 2026US 2026/0301851 A1Deepx Co., Ltd.
- Multi-port memory testing using concurrent operations10 Sep 2026US 2026/0268993 A1Siemens Industry Software Inc.
Most cited
By later US patents
- Built-in self test for integrated circuits189US 5,173,906 A1992
- Data processing system with self testing and configuration mapping capability168US 4,334,307 AHoneywell Information Systems Inc. · 1982
- Memory board with self-testing capability146US 8,001,434 B1Netlist, Inc. · 2011
- Method and apparatus for configurable build-in self-repairing of ASIC memories design120US 5,577,050 ALSI Logic Corporation · 1996
- Synchronous memory test system118US 5,995,424 ATanisys Technology, Inc. · 1999