Memory board with self-testing capability

A self-testing memory module, comprising:

• a printed circuit board configured to be operatively coupled to a memory controller of a computer system;
• a plurality of memory devices on the printed circuit board, each memory device of the plurality of memory devices comprising data, address, and control ports;
• and
• a circuit comprising:
• a control module configured to generate address and control signals for testing the memory devices;
• and
• a data module comprising at least one data handler operatively coupled to a corresponding plurality of the data ports of one or more of the memory devices and configured to generate cyclic data for writing to the corresponding plurality of data ports wherein the circuit is configured to test the memo devices using the address and control signals generated by the control module and the cyclic data generated by the at least one data handler.

A method of self-testing a memory module, comprising:

• providing a self-testing memory module, the self-testing memory module comprising:
• a printed circuit board configured to be operatively coupled to a memory controller of a computer system;
• a plurality of memory devices on the printed circuit board, each memory device of the plurality of memory devices comprising data, address, and control ports;
• and
• a circuit comprising:
• a control module configured to generate address and control signals for testing the memory devices;
• and
• a data module comprising a plurality of data handlers, each data handler operable independently from each of the other data handlers of the plurality of data handlers and operatively coupled to a corresponding plurality of the data ports;
• and
• generating, by the control module, address and control signals for testing the memory devices;
• generating, by each of the data handlers, data for writing to the corresponding plurality of data ports;
• and
• using the address and control signals and the generated data to test the memory devices.