US 2026/0301835 A1 · ERROR SCAN FREQUENCY ADJUSTMENTS

Abstract

Methods, systems, and devices for error scan frequency adjustments are described. A memory system may determine whether a quantity of error scans performed on one or more blocks of memory cells satisfies a threshold quantity of error scans. In some examples, in response to the quantity of error scans satisfying the threshold, the memory system may decrease the frequency of error scans to be performed on the blocks associated with the offset. In other examples, in response to the quantity of error scans failing to satisfy the threshold, the memory system may increase the frequency of error scans to be performed on the blocks associated with the offset. In response to adjusting the error scan frequency, the memory system may perform the error scans according to the adjusted error scan frequency.

Claims20

Dependent claims

An apparatus, comprising:

processing circuitry associated with one or more memory devices and configured to cause the apparatus to:
determine whether a quantity of error scans performed on a first block of memory cells satisfies a threshold value, the threshold value associated with a first read offset value for reading at least the first block of memory cells;
adjusting, based at least in part on determining that the quantity of error scans satisfies the threshold value, a frequency of one or more error scans to be performed on the first block of memory cells;
and
perform, based at least in part on adjusting the frequency of the one or more error scans, the one or more error scans on the first block of memory cells in accordance with the adjusted frequency.

2 more elements

A method, comprising:

determining whether a quantity of error scans performed on a first block of memory cells satisfies a threshold value, the threshold value associated with a first read offset value for reading at least the first block of memory cells;
adjusting, based at least in part on determining that the quantity of error scans satisfies the threshold value, a frequency of one or more error scans to be performed on the first block of memory cells;
and
performing, based at least in part on adjusting the frequency of the one or more error scans, the one or more error scans on the first block of memory cells in accordance with the adjusted frequency.

1 more element

A non-transitory computer-readable medium storing code, the code comprising instructions executable by one or more processors to:

determine whether a quantity of error scans performed on a first block of memory cells satisfies a threshold value, the threshold value associated with a first read offset value for reading at least the first block of memory cells;
adjusting, based at least in part on determining that the quantity of error scans satisfies the threshold value, a frequency of one or more error scans to be performed on the first block of memory cells;
and
perform, based at least in part on adjusting the frequency of the one or more error scans, the one or more error scans on the first block of memory cells in accordance with the adjusted frequency.

1 more element

Dependencies are inferred from the claim text.

Error scan frequency adjustments

Life of this patent

Error scan frequency adjustments

Life of this patent

Abstract

Claims20