G11C 13/0023
Address circuits or decoders
Official title: {Address circuits or decoders}
G11C13/0023 (Address circuits or decoders) appears on 2,612 US grants and 2,847 published applications in this corpus.
Search patents in G11C- Granted patents
- 2,612
- Published applications
- 2,847
- Assignees
- 305
- Inventors
- 2,623
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2001 | 1 | 0 |
| 2002 | 1 | 2 |
| 2003 | 5 | 10 |
| 2004 | 6 | 10 |
| 2005 | 7 | 17 |
| 2006 | 13 | 21 |
| 2007 | 18 | 32 |
| 2008 | 24 | 44 |
| 2009 | 30 | 79 |
| 2010 | 46 | 91 |
| 2011 | 91 | 90 |
| 2012 | 77 | 106 |
| 2013 | 100 | 87 |
| 2014 | 106 | 98 |
| 2015 | 128 | 128 |
| 2016 | 167 | 179 |
| 2017 | 182 | 166 |
| 2018 | 182 | 183 |
| 2019 | 194 | 247 |
| 2020 | 258 | 240 |
| 2021 | 248 | 262 |
| 2022 | 200 | 203 |
| 2023 | 162 | 184 |
| 2024 | 162 | 141 |
| 2025 | 142 | 130 |
| 2026 | 62 | 97 |
By publication year. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Structure for multiple sense amplifiers of memory device29 Sep 2026US 12,749,529 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Wordline-coupled differential programming of two-terminal memory with increased cell density and consistent cell pitch29 Sep 2026US 12,749,531 B1Crossbar, Inc.
- Non-volatile memory having first and second leday circuits, and electronic system and method29 Sep 2026US 12,749,532 B2STMicroelectronics International N. V.
- Memory circuit comprising electronic cells with ovonic threshold switching layers and a control circuit29 Sep 2026US 12,751,017 B2STMicroelectronics International N. V.
- Differential subthreshold read of memory cell pair in a memory device22 Sep 2026US 12,744,083 B2Micron Technology, Inc.
- Segmented reference for tracking column loading8 Oct 2026US 2026/0311759 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Control method and apparatus for non-volatile majority gate circuit and adder circuit based on memristors1 Oct 2026US 2026/0299883 A1Huazhong University of Science and Technology
- Memory device and operating method of the same1 Oct 2026US 2026/0301809 A1SK hynix Inc.
- Efficient and high performance write architecture for high density resistive random access memory24 Sep 2026US 2026/0290450 A1IM2 Solutions, Inc.
- Memory including variable resistor24 Sep 2026US 2026/0290451 A1SK hynix Inc.
Most cited
By later US patents
- Programmable resistance memory arrays with reference cells317US 6,314,014 B1Ovonyx, Inc. · 2001
- Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines288US 7,983,065 B2SanDisk 3D LLC · 2011
- Phase change memory cell and manufacturing method286US 7,688,619 B2Macronix International Co., Ltd. · 2010
- Biasing scheme of floating unselected wordlines and bitlines of a diode-based memory array188US 6,462,984 B1Intel Corporation · 2002
- Methods and apparatus for vertical bit line structures in three-dimensional nonvolatile memory188US 9,595,530 B1SanDisk Technologies LLC · 2017