G11C 11/405
With three charge-transfer gates
Official title: with three charge-transfer gates, e.g. MOS transistors, per cell
G11C11/405 (With three charge-transfer gates) appears on 625 US grants and 623 published applications in this corpus.
Search patents in G11C- Granted patents
- 625
- Published applications
- 623
- Assignees
- 152
- Inventors
- 670
- Latest grant
- 22 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 6 | 0 |
| 1977 | 5 | 0 |
| 1978 | 2 | 0 |
| 1979 | 3 | 0 |
| 1980 | 1 | 0 |
| 1981 | 1 | 0 |
| 1982 | 0 | 0 |
| 1983 | 2 | 0 |
| 1984 | 1 | 0 |
| 1985 | 2 | 0 |
| 1986 | 2 | 0 |
| 1987 | 5 | 0 |
| 1988 | 2 | 0 |
| 1989 | 1 | 0 |
| 1990 | 3 | 0 |
| 1991 | 0 | 0 |
| 1992 | 2 | 0 |
| 1993 | 2 | 0 |
| 1994 | 5 | 0 |
| 1995 | 4 | 0 |
| 1996 | 1 | 0 |
| 1997 | 3 | 0 |
| 1998 | 6 | 0 |
| 1999 | 9 | 0 |
| 2000 | 6 | 0 |
| 2001 | 11 | 6 |
| 2002 | 20 | 15 |
| 2003 | 15 | 26 |
| 2004 | 28 | 26 |
| 2005 | 28 | 39 |
| 2006 | 20 | 21 |
| 2007 | 16 | 18 |
| 2008 | 19 | 19 |
| 2009 | 12 | 15 |
| 2010 | 19 | 14 |
| 2011 | 12 | 23 |
| 2012 | 11 | 29 |
| 2013 | 34 | 15 |
| 2014 | 27 | 19 |
| 2015 | 13 | 19 |
| 2016 | 28 | 14 |
| 2017 | 20 | 15 |
| 2018 | 19 | 19 |
| 2019 | 17 | 21 |
| 2020 | 23 | 32 |
| 2021 | 28 | 23 |
| 2022 | 22 | 42 |
| 2023 | 28 | 34 |
| 2024 | 37 | 35 |
| 2025 | 30 | 48 |
| 2026 | 14 | 36 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Memory device including in-memory operation circuit and operating method thereof22 Sep 2026US 12,744,071 B2Postech Research and Business Development Foundation
- Access circuit and memory cell circuit8 Sep 2026US 12,731,627 B2Macronix International Co., Ltd.
- Storage circuit with gain-cell and self-refresh unit connected between gain-cell and latch circuit25 Aug 2026US 12,718,863 B2National Tsing Hua University
- Operation method of semiconductor device11 Aug 2026US 12,706,132 B2Semiconductor Energy Laboratory Co.Ltd.
- Integrated assemblies and methods forming integrated assemblies2 Jun 2026US 12,646,538 B2Micron Technology, Inc.
- Structure and method for in-memory logic gates using gain-cell embedded dram (gc-edram)8 Oct 2026US 2026/0311737 A1Technion Research & Development Foundation Limited
- Data read-write circuit and method therefor, memory and driving method therefor, and electronic device1 Oct 2026US 2026/0301798 A1
- Memory cell having three-dimensional structure, operating method thereof, and memory device1 Oct 2026US 2026/0304733 A1Foundation for Research and Business, Seoul National University of Science and Technology
- Gain cell memory device using enhanced sensing scheme and methods for operating the same10 Sep 2026US 2026/0268957 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor Device10 Sep 2026US 2026/0271262 A1Semiconductor Energy Laboratory Co.Ltd.
Most cited
By later US patents
- Semiconductor signal processing device422US 8,274,841 B2Renesas Electronics Corporation · 2012
- High speed DRAM architecture with uniform access latency419US 8,503,250 B2Mosaid Technologies Incorporated · 2013
- Planar capacitor memory cell and its applications311US 7,209,384 B12007
- Capacitorless DRAM device on silicon-on-insulator substrate250US 5,448,513 AThe Regents of the University of California · 1995
- Body contacted dynamic memory212US 6,111,778 AInternational Business Machines Corporation · 2000