G01R 31/31919
Storing and outputting test patterns
Official title: {Storing and outputting test patterns (G01R31/31924 takes precedence; arithmetic and random test patterns generator)}
G01R31/31919 (Storing and outputting test patterns) appears on 446 US grants and 262 published applications in this corpus.
Search patents in G01R- Granted patents
- 446
- Published applications
- 262
- Assignees
- 146
- Inventors
- 715
- Latest grant
- 11 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1978 | 1 | 0 |
| 1979 | 1 | 0 |
| 1980 | 3 | 0 |
| 1981 | 5 | 0 |
| 1982 | 3 | 0 |
| 1983 | 2 | 0 |
| 1984 | 4 | 0 |
| 1985 | 6 | 0 |
| 1986 | 4 | 0 |
| 1987 | 10 | 0 |
| 1988 | 8 | 0 |
| 1989 | 8 | 0 |
| 1990 | 3 | 0 |
| 1991 | 3 | 0 |
| 1992 | 10 | 0 |
| 1993 | 9 | 0 |
| 1994 | 12 | 0 |
| 1995 | 8 | 0 |
| 1996 | 7 | 0 |
| 1997 | 15 | 0 |
| 1998 | 15 | 0 |
| 1999 | 22 | 0 |
| 2000 | 17 | 0 |
| 2001 | 15 | 6 |
| 2002 | 15 | 11 |
| 2003 | 11 | 13 |
| 2004 | 12 | 20 |
| 2005 | 7 | 20 |
| 2006 | 20 | 16 |
| 2007 | 18 | 14 |
| 2008 | 16 | 19 |
| 2009 | 17 | 17 |
| 2010 | 18 | 15 |
| 2011 | 18 | 16 |
| 2012 | 10 | 8 |
| 2013 | 7 | 6 |
| 2014 | 6 | 10 |
| 2015 | 8 | 11 |
| 2016 | 7 | 3 |
| 2017 | 9 | 3 |
| 2018 | 7 | 9 |
| 2019 | 5 | 7 |
| 2020 | 9 | 7 |
| 2021 | 7 | 9 |
| 2022 | 7 | 7 |
| 2023 | 7 | 6 |
| 2024 | 8 | 4 |
| 2025 | 4 | 2 |
| 2026 | 2 | 3 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Signal generator circuit for a quantum computer control device11 Aug 2026US 12,704,870 B2Rohde & Schwarz GmbH & Co.KG
- Tester channel multiplexing in test equipment28 Apr 2026US 12,615,096 B2Yangtze Memory Technologies Co., Ltd.
- Pattern generation system with pin function mapping23 Dec 2025US 12,504,470 B2Yangtze Memory Technologies Co., Ltd.
- Templatized memory pattern generator and method16 Sep 2025US 12,416,669 B2Macrotest Semiconductor Technology Co., Ltd
- Clock recovery unit adjustment18 Mar 2025US 12,255,979 B2Keysight Technologies, Inc.
- Test time optimization for identical subsystems in soc13 Aug 2026US 2026/0235673 A1STMicroelectronics International N. V.
- Method and system for correlating and filtering high-speed signal (hss) jitter with power supply ripple16 Jul 2026US 2026/0202470 A1Tektronix, Inc.
- Test apparatus, test method, and program26 Mar 2026US 2026/0086148 A1Advantest Corporation
- Templatized memory pattern generator and method31 Jul 2025US 2025/0244384 A1Macrotest Semiconductor Technology Co., Ltd
- Tester channel multiplexing in test equipment16 Jan 2025US 2025/0023646 A1Yangtze Memory Technologies Co., Ltd.
Most cited
By later US patents
- Method and device for compressing and expanding data pattern117US 6,661,839 B1Advantest Corporation · 2003
- Method and apparatus for testing logic circuitry by applying a logical test pattern116US 5,072,178 AHitachi, Ltd. · 1991
- Circuit-board tester with backdrive-based burst timing109US 6,175,230 B1GenRad, Inc. · 2001
- Bit error measurement system108US 5,761,216 AAdvantest Corporation · 1998
- Parallel compression test circuit of memory device84US 7,187,195 B2Hynix Semiconductor Inc. · 2007