H10W 90/24
At least one of the stacked chips being laterally offset from a
Official title: at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape
H10W90/24 (At least one of the stacked chips being laterally offset from a) appears on 2,750 US grants and 3,713 published applications in this corpus.
Search patents in H10W- Granted patents
- 2,750
- Published applications
- 3,713
- Assignees
- 368
- Inventors
- 4,232
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1992 | 1 | 0 |
| 1993 | 2 | 0 |
| 1994 | 5 | 0 |
| 1995 | 3 | 0 |
| 1996 | 9 | 0 |
| 1997 | 10 | 0 |
| 1998 | 12 | 0 |
| 1999 | 13 | 0 |
| 2000 | 16 | 0 |
| 2001 | 13 | 14 |
| 2002 | 33 | 33 |
| 2003 | 27 | 38 |
| 2004 | 32 | 45 |
| 2005 | 25 | 52 |
| 2006 | 39 | 55 |
| 2007 | 36 | 73 |
| 2008 | 41 | 115 |
| 2009 | 52 | 127 |
| 2010 | 78 | 110 |
| 2011 | 114 | 121 |
| 2012 | 101 | 118 |
| 2013 | 120 | 153 |
| 2014 | 137 | 132 |
| 2015 | 148 | 173 |
| 2016 | 162 | 107 |
| 2017 | 106 | 109 |
| 2018 | 98 | 115 |
| 2019 | 119 | 139 |
| 2020 | 116 | 195 |
| 2021 | 140 | 252 |
| 2022 | 197 | 289 |
| 2023 | 226 | 289 |
| 2024 | 184 | 293 |
| 2025 | 193 | 275 |
| 2026 | 142 | 291 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
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Most cited
By later US patents
- 3DIC stacking device and method of manufacture962US 9,443,783 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2016
- Multi-stack package-on-package structures744US 9,735,131 B2Taiwan Semiconductor Manufacturing Company.Ltd · 2017
- Method of forming a semiconductor package and structure thereof283US 7,030,469 B2Freescale Semiconductor, Inc. · 2006
- Integrated micro-channels for 3D through silicon architectures270US 7,432,592 B2Intel Corporation · 2008
- Stack chip and stack chip package having the same265US 7,768,115 B2Samsung Electronics Co., Ltd. · 2010