H10W 80/165
Using passive alignment
Official title: {using passive alignment, e.g. using self-alignment}
H10W80/165 (Using passive alignment) appears on 44 US grants and 69 published applications in this corpus.
Search patents in H10W- Granted patents
- 44
- Published applications
- 69
- Assignees
- 37
- Inventors
- 175
- Latest grant
- 25 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2004 | 0 | 1 |
| 2005 | 0 | 0 |
| 2006 | 0 | 0 |
| 2007 | 0 | 0 |
| 2008 | 0 | 0 |
| 2009 | 0 | 0 |
| 2010 | 0 | 1 |
| 2011 | 0 | 2 |
| 2012 | 0 | 0 |
| 2013 | 0 | 2 |
| 2014 | 1 | 0 |
| 2015 | 3 | 5 |
| 2016 | 2 | 0 |
| 2017 | 5 | 3 |
| 2018 | 2 | 4 |
| 2019 | 4 | 7 |
| 2020 | 3 | 6 |
| 2021 | 5 | 5 |
| 2022 | 2 | 3 |
| 2023 | 3 | 9 |
| 2024 | 5 | 5 |
| 2025 | 6 | 10 |
| 2026 | 3 | 6 |
By publication year. 2026 runs to 8 Oct.
Recent patents
- Method of assembly by direct bonding of electronic components25 Aug 2026US 12,721,248 B2Commissariat A L' Energie Atomique Et Aux Energies Alternatives
- Semiconductor device including joint portion between conductive connection structures and method of fabricating the same18 Aug 2026US 12,713,975 B2SK hynix Inc.
- Self-aligning bonding by hydrophilic contrast2 Jun 2026US 12,648,475 B2Commissariat A L' Energie Atomique Et Aux Energies Alternatives
- Electronic circuit manufacturing method for self-assembly to another electronic circuit18 Nov 2025US 12,477,658 B2Commissariat A L' Energie Atomique Et Aux Energies Alternatives
- Semiconductor interconnect structures with vertically offset bonding surfaces, and associated systems and methods11 Nov 2025US 12,469,809 B2Micron Technology, Inc.
- Alignment method of semiconductor chip, bonding method, semiconductor device, and electronic component manufacturing system30 Jul 2026US 2026/0223729 A1Tohoku University
- Method of bonding wafer and chip23 Jul 2026US 2026/0215351 A1Samsung Electronics Co., Ltd.
- Self-aligned pick and place methods and apparatuses2 Jul 2026US 2026/0190952 A1Intel Corporation
- Self-aligned die-to-wafer bonding architecture4 Jun 2026US 2026/0157224 A1SanDisk Technologies LLC
- Wafer-to-wafer direct bonding method14 May 2026US 2026/0136844 A1Commissariat A L' Energie Atomique Et Aux Energies Alternatives
Most cited
By later US patents
- Three-dimensional memory device containing self-aligned interlocking bonded structure and method of making the same51US 10,381,322 B1SanDisk Technologies LLC · 2019
- Chip-on-wafer bonding method and bonding device, and structure comprising chip and wafer27US 9,142,532 B2Bondtech Co., Ltd. · 2015
- Method for disposing fine objects, apparatus for arranging fine objects, illuminating apparatus and display apparatus17US 9,181,630 B2Sharp Kabushiki Kaisha · 2015
- Bondable device including a hydrophilic layer14US 9,773,741 B1QUALCOMM Incorporated · 2017
- Method for aligning micro-electronic components9US 9,601,459 B2Imec Vzw · 2017