Chip-on-wafer bonding method and bonding device, and structure comprising chip and wafer
AssigneeBondtech Co., Ltd.
InventorsTadatomo Suga, Akira Yamauchi
Life of this patent
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AssigneeBondtech Co., Ltd.
InventorsTadatomo Suga, Akira Yamauchi
Estimating the term…
[Problem] Provided is a technique for bonding chips efficiently onto a wafer to establish an electrical connection and raise mechanical strength between the chips and the wafer or between the chips that are chips laminated onto each other in the state that resin and other undesired residues do not remain on a bond interface therebetween. [Solution] A method for bonding plural chips each having a chip-side-bond-surface having metal regions to a substrate having plural bond portions has the step (S1) of subjecting the metal regions of the chip-side-bond-surface to surface activating treatment and hydrophilizing treatment; the step (S2) of subjecting the bond portions of the substrate to surface activating treatment and hydrophilizing treatment; the step (S3) of fitting the chips subjected to the surface activating treatment and the hydrophilizing treatment onto the corresponding bond portions of the substrate subjected to the surface activating treatment and the hydrophilizing treatment to bring the metal regions of the chips into contact with the bond portions of the substrate; and the step (S4) of heating the resultant structure, which includes the substrate, and the chips fitted onto the substrate.
A method for bonding plural chips each having a chip-side-bond-surface having one or more metal regions to a substrate having plural bond portions,
A method for laminating plural chip layers each comprising chips, the number of the chips being a predetermined number and each of the chips having a first bond surface having one or more metal regions and a second bond surface positioned on a rear side of the first bond surface, in a multilayered form over a substrate having plural bond portions, thereby bonding the chip layers to the substrate,
A device comprising a usable-for-chip surface activating treatment means which causes particles having a predetermined kinetic energy to collide with a chip-side-bond-surface of plural chips to subject at least a metal region(s) of the chip-side-bond-surface to surface activating treatment,
A device comprising:
A method for bonding plural chips each having a chip-side-bond-surface having one or more metal regions to a substrate having plural bond portions,
Dependencies are inferred from the claim text.