H10P 30/218
Characterised by the implantation in a compound semiconductor of both electrically active
Official title: {characterised by the implantation in a compound semiconductor of both electrically active and inactive species in the same semiconductor region to be doped n-type or p-type}
H10P30/218 (Characterised by the implantation in a compound semiconductor of both electrically active) appears on 141 US grants and 135 published applications in this corpus.
Search patents in H10P- Granted patents
- 141
- Published applications
- 135
- Assignees
- 71
- Inventors
- 289
- Latest grant
- 25 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 0 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 3 | 0 |
| 1984 | 2 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 1 | 0 |
| 1989 | 1 | 0 |
| 1990 | 2 | 0 |
| 1991 | 3 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 5 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 2 | 0 |
| 1999 | 3 | 0 |
| 2000 | 4 | 0 |
| 2001 | 2 | 0 |
| 2002 | 1 | 1 |
| 2003 | 1 | 1 |
| 2004 | 2 | 0 |
| 2005 | 0 | 1 |
| 2006 | 0 | 1 |
| 2007 | 0 | 1 |
| 2008 | 3 | 3 |
| 2009 | 0 | 3 |
| 2010 | 1 | 0 |
| 2011 | 1 | 2 |
| 2012 | 3 | 2 |
| 2013 | 4 | 2 |
| 2014 | 3 | 10 |
| 2015 | 6 | 6 |
| 2016 | 9 | 10 |
| 2017 | 10 | 5 |
| 2018 | 3 | 11 |
| 2019 | 11 | 14 |
| 2020 | 9 | 7 |
| 2021 | 7 | 8 |
| 2022 | 11 | 16 |
| 2023 | 5 | 7 |
| 2024 | 7 | 16 |
| 2025 | 6 | 6 |
| 2026 | 8 | 2 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
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- SiC MOSFET with reduced on-resistance4 Aug 2026US 12,701,761 B2Infineon Technologies AG
- Fin structure with reduced defects and manufacturing method thereof4 Aug 2026US 12,701,934 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Gallium nitride superjunction transistor19 May 2026US 12,635,158 B2Analog Devices, Inc.
- Method for manufacturing semiconductor device12 May 2026US 12,628,583 B2Kabushiki Kaisha Toshiba
- Method of manufacturing semiconductor device and semiconductor device2 Jul 2026US 2026/0190364 A1Kabushiki Kaisha Toshiba
- Diffusion suppression in high-temperature annealing of nitrides12 Mar 2026US 2026/0076116 A1The Government of the United States of America, as represented by the Secretary of the Navy
- Power mosfet provided with a variable transparency edge ring formed by a high-depth auto-aligned implant18 Sep 2025US 2025/0294801 A1STMicroelectronics International N. V.
- Methods of Forming WBG and UWBG Semiconductors with P- and N-type Conductivity5 Jun 2025US 2025/0183038 A1The Government of the United States of America, as represented by the Secretary of the Navy
- Method of silicon carbide semiconductor device and silicon carbide semiconductor device5 Jun 2025US 2025/0185287 A1Fuji Electric Co., Ltd.
Most cited
By later US patents
- Semiconductor devices including implanted regions and protective layers and methods of forming the same103US 7,419,892 B2Cree, Inc. · 2008
- Formation and treatment of epitaxial layer containing silicon and carbon99US 7,741,200 B2APPLIED Materials.Inc. · 2010
- Structure and method for forming power devices with carbon-containing region98US 7,994,573 B2Fairchild Semiconductor Corporation · 2011
- Method of manufacturing silicon carbide semiconductor device with high activation rate of impurities71US 6,221,700 B1Denso Corporation · 2001
- Method of fabricating silicon carbide field effect transistor61US 5,322,802 ANorth Carolina State University at Raleigh · 1994