SiC MOSFET with reduced on-resistance
AssigneeInfineon Technologies AG
InventorsRalf Siemieniec, Thomas Aichinger, Ravi Keshav Joshi, Werner Schustereder
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Abstract
A silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) and a method for forming a SiC MOSFET are disclosed. In an example, the method includes forming a gate dielectric that adjoins a body region arranged in a semiconductor body, and forming a gate electrode on the gate dielectric. Forming the gate electrode includes forming a first electrode layer, implanting work function adjusting atoms into the first electrode layer, and forming a second electrode layer on the first electrode layer.
Claims17
A method for forming a silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET), wherein the method comprises:
- forming a gate dielectric that adjoins a body region arranged in a semiconductor body;
- and
- forming a gate electrode on the gate dielectric, wherein forming the gate electrode comprises:
- forming a first electrode layer;
- implanting work function adjusting atoms into the first electrode layer;
- and
- after implanting the work function adjusting atoms into the first electrode layer, forming a second electrode layer on the first electrode layer.
Dependencies are inferred from the claim text.