H10B 20/30
Having the source region and the drain region on the same level
Official title: {having the source region and the drain region on the same level, e.g. lateral transistors}
H10B20/30 (Having the source region and the drain region on the same level) appears on 690 US grants and 440 published applications in this corpus.
Search patents in H10B- Granted patents
- 690
- Published applications
- 440
- Assignees
- 195
- Inventors
- 843
- Latest grant
- 1 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 1 | 0 |
| 1978 | 2 | 0 |
| 1979 | 3 | 0 |
| 1980 | 4 | 0 |
| 1981 | 6 | 0 |
| 1982 | 8 | 0 |
| 1983 | 8 | 0 |
| 1984 | 1 | 0 |
| 1985 | 4 | 0 |
| 1986 | 2 | 0 |
| 1987 | 2 | 0 |
| 1988 | 2 | 0 |
| 1989 | 3 | 0 |
| 1990 | 3 | 0 |
| 1991 | 4 | 0 |
| 1992 | 6 | 0 |
| 1993 | 6 | 0 |
| 1994 | 12 | 0 |
| 1995 | 16 | 0 |
| 1996 | 26 | 0 |
| 1997 | 34 | 0 |
| 1998 | 32 | 0 |
| 1999 | 40 | 0 |
| 2000 | 35 | 0 |
| 2001 | 41 | 12 |
| 2002 | 30 | 33 |
| 2003 | 30 | 41 |
| 2004 | 49 | 42 |
| 2005 | 29 | 30 |
| 2006 | 20 | 19 |
| 2007 | 18 | 14 |
| 2008 | 9 | 19 |
| 2009 | 10 | 12 |
| 2010 | 17 | 8 |
| 2011 | 9 | 10 |
| 2012 | 7 | 9 |
| 2013 | 14 | 15 |
| 2014 | 12 | 10 |
| 2015 | 8 | 6 |
| 2016 | 13 | 13 |
| 2017 | 9 | 11 |
| 2018 | 15 | 15 |
| 2019 | 15 | 14 |
| 2020 | 10 | 19 |
| 2021 | 15 | 7 |
| 2022 | 6 | 14 |
| 2023 | 12 | 14 |
| 2024 | 10 | 15 |
| 2025 | 13 | 21 |
| 2026 | 8 | 17 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Read-only memory device and method1 Sep 2026US 12,727,158 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Power device with low gate charge and low figure of merit18 Aug 2026US 12,713,646 B2Infineon Technologies Americas Corp.
- Encoded read-only memory and decoder19 May 2026US 12,633,363 B2QUALCOMM Incorporated
- Multi-stack bitcell architecture7 Apr 2026US 12,598,741 B2Arm Limited
- Read-only memory method, layout, and device17 Mar 2026US 12,580,033 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Integrated circuit with hard-coded ic-specific code, device and method8 Oct 2026US 2026/0313887 A1Sandgrain B.V.
- Memory device operating method8 Oct 2026US 2026/0313888 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Read-only memory array for reducing the layout areas of capacitors and read-only memory thereof20 Aug 2026US 2026/0245598 A1Yield Microelectronics Corp.
- Memory devices and methods of manufacturing thereof13 Aug 2026US 2026/0237447 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor device and method of manufacturing same23 Jul 2026US 2026/0212897 A1
Most cited
By later US patents
- TFT mask ROM and method for making same312US 6,841,813 B2Matrix Semiconductor, Inc. · 2005
- Process for producing two bit ROM cell utilizing angled implant187US 6,030,871 ASaifun Semiconductors Ltd. · 2000
- Two bit ROM cell and process for producing same149US 6,201,282 B1Saifun Semiconductors Ltd. · 2001
- Plane decoding method and device for three dimensional memories149US 6,906,940 B1Macronix International Co., Ltd. · 2005
- Static memory cell and method of manufacturing a static memory cell135US 5,780,906 AMicron Technology, Inc. · 1998