Memory device operating method

A method, comprising:

• pre-charging a bit line to a pre-charge voltage, the bit line electrically coupled to
• a first source/drain of a first semiconductor device of a first type, and
• a first source/drain of a second semiconductor device of a second type different from the first type, the second semiconductor device over or under the first semiconductor device;
• thereafter
• turning ON the first semiconductor device,
• in response to a voltage level on the bit line remaining at the pre-charge voltage, outputting a first logic value, and
• in response to the voltage level on the bit line varying from the pre-charge voltage, outputting a second logic value different from the first logic value;
• or
• turning ON the second semiconductor device,
• in response to the voltage level on the bit line remaining at the pre-charge voltage, outputting the second logic value, and
• in response to the voltage level on the bit line varying from the pre-charge voltage, outputting the first logic value.

A method, comprising:

• pre-charging a pair of differential bit lines, wherein
• one of the pair of differential bit lines is electrically coupled to a source/drain of a first semiconductor device of a complementary field effect transistor (CFET) device, and
• the other of the pair of differential bit lines is electrically coupled to a source/drain of a second semiconductor device of the CFET device, the second semiconductor device over or under the first semiconductor device;
• applying a first access voltage to a gate of the first semiconductor device and a second access voltage to a gate of the second semiconductor device, the second access voltage corresponding to the first access voltage;
• sensing a first logic value stored in the CFET device in response to a first relationship between first and second voltages correspondingly on the pair of differential bit lines;
• and
• sensing a second logic value stored in the CFET device in response to a second relationship between the first and second voltages, the second logic value different from the first logic value, and the second relationship different from the first relationship.