Read-only memory device and method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorKu-Feng Lin
Life of this patent
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Abstract
A read-only memory (ROM) device includes a complementary field effect transistor (CFET) device which has a first semiconductor device of a first type, and a second semiconductor device of a second type different from the first type. The second semiconductor device is over or under the first semiconductor device. A first word line is electrically coupled to a gate of the first semiconductor device. A second word line is electrically coupled to a gate of the second semiconductor device. At least one bit line is electrically coupled to at least one of a first source/drain of the first semiconductor device, or a first source/drain of the second semiconductor device.
Claims20
A read-only memory (ROM) device, comprising:
- a complementary field effect transistor (CFET) device comprising:
- a first semiconductor device of a first type;
- and
- a second semiconductor device of a second type different from the first type, the second semiconductor device over or under the first semiconductor device;
- a first word line electrically coupled to a gate of the first semiconductor device;
- a second word line electrically coupled to a gate of the second semiconductor device;
- and
- at least one bit line electrically coupled to at least one of
- a first source/drain of the first semiconductor device, or
- a first source/drain of the second semiconductor device,
- wherein
- the first semiconductor device is configured to store a first logic value, and
- the second semiconductor device is configured to store a second logic value, independently of the first logic value stored in the first semiconductor device.
A read-only memory (ROM) device, comprising:
- a complementary field effect transistor (CFET) device comprising:
- a first semiconductor device of a first type;
- and
- a second semiconductor device of a second type different from the first type, the second semiconductor device under the first semiconductor device;
- a first word line electrically coupled to a gate of the first semiconductor device;
- a second word line electrically coupled to a gate of the second semiconductor device;
- and
- a bit line electrically coupled to both a first source/drain of the first semiconductor device and a first source/drain of the second semiconductor device,
- wherein a second source/drain of the first semiconductor device and a second source/drain of the second semiconductor device are electrically disconnected from each other.
A read-only memory (ROM) device, comprising:
- a first complementary field effect transistor (CFET) device comprising:
- a first semiconductor device of a first type;
- and
- a second semiconductor device of a second type different from the first type, the second semiconductor device under or over the first semiconductor device;
- a first word line electrically coupled to a gate of the first semiconductor device;
- a first power rail electrically coupled to a first source/drain of the first semiconductor device;
- a first bit line electrically coupled to a second source/drain of the first semiconductor device;
- a second word line electrically coupled to a gate of the second semiconductor device;
- a second power rail electrically coupled to a first source/drain of the second semiconductor device;
- and
- a second bit line electrically coupled to a second source/drain of the second semiconductor device.
Dependencies are inferred from the claim text.