G11C 29/56004
Pattern generation
Official title: {Pattern generation}
G11C29/56004 (Pattern generation) appears on 279 US grants and 306 published applications in this corpus.
Search patents in G11C- Granted patents
- 279
- Published applications
- 306
- Assignees
- 108
- Inventors
- 604
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1984 | 1 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 1 | 0 |
| 2000 | 3 | 0 |
| 2001 | 1 | 2 |
| 2002 | 0 | 8 |
| 2003 | 3 | 8 |
| 2004 | 12 | 21 |
| 2005 | 14 | 17 |
| 2006 | 10 | 18 |
| 2007 | 18 | 14 |
| 2008 | 15 | 15 |
| 2009 | 15 | 11 |
| 2010 | 14 | 8 |
| 2011 | 8 | 6 |
| 2012 | 6 | 9 |
| 2013 | 7 | 10 |
| 2014 | 6 | 1 |
| 2015 | 5 | 11 |
| 2016 | 9 | 3 |
| 2017 | 6 | 10 |
| 2018 | 10 | 12 |
| 2019 | 10 | 15 |
| 2020 | 16 | 10 |
| 2021 | 13 | 11 |
| 2022 | 13 | 20 |
| 2023 | 12 | 12 |
| 2024 | 21 | 27 |
| 2025 | 17 | 19 |
| 2026 | 13 | 8 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Semiconductor device, semiconductor device testing apparatus and semiconductor device testing method6 Oct 2026US 12,755,809 B2Renesas Electronics Corporation
- Flash memory and testing method thereof15 Sep 2026US 12,738,340 B2Winbond Electronics Corp.
- Memory device including damage detection circuit and test system including the memory device11 Aug 2026US 12,706,171 B2Samsung Electronics Co., Ltd.
- Technique to analyze and report accurate data, synchronizing multiple signals in a memory chip23 Jun 2026US 12,665,044 B2Tektronix, Inc.
- Memory device23 Jun 2026US 12,665,045 B2Etron Technology, Inc.
- Method for determining timing parameter of memory chip, controller, device, and medium30 Jul 2026US 2026/0221211 A1Shenzhen Rayson Technology Co., Ltd.
- Scan-path integrated circuit memory with output bus feedback9 Jul 2026US 2026/0196286 A1SambaNova Systems, Inc.
- Semiconductor device, control method for semiconductor device and control program25 Jun 2026US 2026/0179714 A1Renesas Electronics Corporation
- Pattern-generating device9 Apr 2026US 2026/0100236 A1Advantest Corporation
- Test system and method for memory parameter calibration26 Mar 2026US 2026/0088121 A1Winbond Electronics Corp.
Most cited
By later US patents
- Method and computer program for efficient cell failure rate estimation in cell arrays118US 7,380,225 B2International Business Machines Corporation · 2008
- System and method for on-board diagnostics of memory modules110US 7,210,059 B2Micron Technology, Inc. · 2007
- Method and apparatus for testing a storage device72US 6,757,845 B2BiTMICRO Networks, Inc. · 2004
- Highly compressible representation of test pattern data39US 5,905,986 AHewlett-Packard Company · 1999
- Test pattern generator for SRAM and DRAM33US 6,934,900 B1Global Unichip Corporation · 2005