G11C 2216/04
Nonvolatile memory cell provided with a separate control gate for erasing the
Official title: Nonvolatile memory cell provided with a separate control gate for erasing the cells, i.e. erase gate, independent of the normal read control gate
G11C2216/04 (Nonvolatile memory cell provided with a separate control gate for erasing the) appears on 113 US grants and 123 published applications in this corpus.
Search patents in G11C- Granted patents
- 113
- Published applications
- 123
- Assignees
- 30
- Inventors
- 145
- Latest grant
- 14 Jul 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1997 | 1 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 0 |
| 2003 | 0 | 0 |
| 2004 | 0 | 0 |
| 2005 | 0 | 1 |
| 2006 | 1 | 1 |
| 2007 | 1 | 0 |
| 2008 | 0 | 0 |
| 2009 | 0 | 0 |
| 2010 | 0 | 1 |
| 2011 | 1 | 0 |
| 2012 | 0 | 0 |
| 2013 | 1 | 0 |
| 2014 | 1 | 1 |
| 2015 | 0 | 1 |
| 2016 | 5 | 3 |
| 2017 | 3 | 6 |
| 2018 | 2 | 5 |
| 2019 | 9 | 15 |
| 2020 | 15 | 21 |
| 2021 | 13 | 21 |
| 2022 | 20 | 14 |
| 2023 | 11 | 13 |
| 2024 | 12 | 13 |
| 2025 | 12 | 2 |
| 2026 | 5 | 5 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Memory device and method of erasure operations using GIDL and negative wordline voltages14 Jul 2026US 12,682,958 B2SK hynix Inc.
- Method for forming semiconductor structure with wave shaped erase gate10 Mar 2026US 12,573,458 B2United Microelectronics Corp.
- Method of scanning an image using non-volatile memory array neural network classifier3 Feb 2026US 12,541,679 B2Silicon Storage Technology, Inc.
- Transistor and method for manufacturing the same3 Feb 2026US 12,543,348 B2Taiwan Semiconductor Manufacturing Company.Ltd
- Adaptive bias decoder for non-volatile memory system6 Jan 2026US 12,518,829 B2Silicon Storage Technology, Inc.
- Non-volatile memory integrated circuit and corresponding manufacturing method23 Jul 2026US 2026/0214894 A1STMicroelectronics International N. V.
- Temperature compensation for analog memory cells in a neural network7 May 2026US 2026/0128092 A1Silicon Storage Technology, Inc.
- Transistor and method for manufacturing the same7 May 2026US 2026/0129917 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Semiconductor memory device5 Feb 2026US 2026/0040542 A1United Microelectronics Corp.
- Analog computing unit for representing negative weights22 Jan 2026US 2026/0024581 A1Intelligent HW, Inc.
Most cited
By later US patents
- Self-aligned split-gate NAND flash memory and fabrication process32US 6,992,929 B2Actrans System Incorporation, USA · 2006
- Flash memory array with individual memory cell read, program and erase20US 10,269,440 B2Silicon Storage Technology, Inc. · 2019
- Nonvolatile semiconductor memory device with dual insulation layers between adjacent gate structures19US 5,637,897 ANEC Corporation · 1997
- Flash memory system using complementary voltage supplies16US 9,361,995 B1Silicon Storage Technology, Inc. · 2016
- Hybrid chargepump and regulation means and method for flash memory device14US 8,867,281 B2Silicon Storage Technology, Inc. · 2014