Adaptive bias decoder for non-volatile memory system
AssigneeSilicon Storage Technology, Inc.
InventorsHieu Van Tran, Thuan Vu, Stanley Hong, Stephen Trinh, Anh Ly, Nhan Do, Mark Reiten
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Abstract
In one example, a non-volatile memory system, comprises an array of non-volatile memory cells arranged in rows and columns, each non-volatile memory cell comprising a source and a drain; a plurality of bit lines, each of the plurality of bit lines coupled to the drain or each non-volatile memory cell in a column of non-volatile memory cells; a source line coupled to the source of each non-volatile memory cell; and an adaptive bias decoder for providing a voltage to the source line of the array during operation.
Claims6
A non-volatile memory system, comprising:
- an array of non-volatile memory cells arranged in rows and columns, each non-volatile memory cell comprising a source and a drain, the array comprising a reference node;
- a source line coupled to the source of each non-volatile memory cell in a row of non-volatile memory cells in the array;
- an adaptive bias circuit for generating a reference voltage that varies in response to a change in a voltage of the reference node;
- and
- a digital-to-analog converter for converting a digital input comprising one of N possible values, where N>2, into an analog voltage using the voltage of the reference node and the reference voltage and providing the analog voltage to the source line during a program operation to program the one of N possible values into a selected non-volatile memory cell in the array.
Dependencies are inferred from the claim text.