G11C 17/165
Memory cells which are electrically programmed to cause a change in resistance
Official title: {Memory cells which are electrically programmed to cause a change in resistance, e.g. to permit multiple resistance steps to be programmed rather than conduct to or from non-conduct change of fuses and antifuses (digital stores using resistance random access memory elements G11C13/0002)}
G11C17/165 (Memory cells which are electrically programmed to cause a change in resistance) appears on 520 US grants and 575 published applications in this corpus.
Search patents in G11C- Granted patents
- 520
- Published applications
- 575
- Assignees
- 150
- Inventors
- 751
- Latest grant
- 18 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1995 | 1 | 0 |
| 1996 | 1 | 0 |
| 1997 | 2 | 0 |
| 1998 | 0 | 0 |
| 1999 | 1 | 0 |
| 2000 | 1 | 0 |
| 2001 | 1 | 0 |
| 2002 | 4 | 3 |
| 2003 | 8 | 16 |
| 2004 | 10 | 11 |
| 2005 | 4 | 16 |
| 2006 | 12 | 28 |
| 2007 | 26 | 26 |
| 2008 | 23 | 44 |
| 2009 | 23 | 26 |
| 2010 | 40 | 30 |
| 2011 | 25 | 21 |
| 2012 | 24 | 28 |
| 2013 | 23 | 16 |
| 2014 | 27 | 24 |
| 2015 | 17 | 19 |
| 2016 | 29 | 19 |
| 2017 | 23 | 26 |
| 2018 | 21 | 31 |
| 2019 | 28 | 27 |
| 2020 | 27 | 17 |
| 2021 | 24 | 17 |
| 2022 | 8 | 18 |
| 2023 | 26 | 42 |
| 2024 | 23 | 29 |
| 2025 | 29 | 26 |
| 2026 | 9 | 15 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Semiconductor integrated circuit18 Aug 2026US 12,712,038 B2Rohm Co., Ltd.
- Secure anti-fuse one time programmable bit cell design4 Aug 2026US 12,700,467 B2QUALCOMM Incorporated
- Interconnect via metal-insulator-metal (MIM) fuse for integrated circuitry9 Jun 2026US 12,653,027 B2Intel Corporation
- 3D semiconductor device and structure with logic and memory2 Jun 2026US 12,648,143 B2Monolithic 3D Inc.
- Antifuse-type non-volatile memory cell19 May 2026US 12,635,132 B2eMemory Technology Inc.
- 3d efuse with data poison8 Oct 2026US 2026/0311786 A1Advanced Micro Devices, Inc.
- Semiconductor apparatus, recording head, and writing method for memory circuit24 Sep 2026US 2026/0290480 A1Canon Kabushiki Kaisha
- Memory circuit and method of forming the same27 Aug 2026US 2026/0253623 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Efuse bit-cell in stacking structure13 Aug 2026US 2026/0237448 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Memory device and method of operating the same23 Jul 2026US 2026/0212938 A1Taiwan Semiconductor Manufacturing Company.Ltd
Most cited
By later US patents
- Electrically addressable passive device, method for electrical addressing of the same and uses of the device and the method377US 6,055,180 AThin Film Electronics ASA · 2000
- Vertically stacked field programmable nonvolatile memory and method of fabrication305US 6,483,736 B2Matrix Semiconductor, Inc. · 2002
- Carbon nanotube devices268US 6,528,020 B1The Board of Trustees of the Leland Stanford Junior University · 2003
- Methods of operating a bistable resistance random access memory with multiple memory layers and multilevel memory states260US 7,586,778 B2Macronix International Co., Ltd. · 2009
- Carbon nanotube structures made using catalyst islands206US 6,346,189 B1The Board of Trustees of the Leland Stanford Junior University · 2002