G11C 11/4076
Timing circuits
Official title: Timing circuits (for regeneration management G11C11/406)
G11C11/4076 (Timing circuits) appears on 4,236 US grants and 4,128 published applications in this corpus.
Search patents in G11C- Granted patents
- 4,236
- Published applications
- 4,128
- Assignees
- 415
- Inventors
- 4,044
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 6 | 0 |
| 1977 | 5 | 0 |
| 1978 | 3 | 0 |
| 1979 | 1 | 0 |
| 1980 | 4 | 0 |
| 1981 | 5 | 0 |
| 1982 | 2 | 0 |
| 1983 | 6 | 0 |
| 1984 | 5 | 0 |
| 1985 | 8 | 0 |
| 1986 | 5 | 0 |
| 1987 | 6 | 0 |
| 1988 | 9 | 0 |
| 1989 | 8 | 0 |
| 1990 | 6 | 0 |
| 1991 | 15 | 0 |
| 1992 | 11 | 0 |
| 1993 | 11 | 0 |
| 1994 | 21 | 0 |
| 1995 | 19 | 0 |
| 1996 | 16 | 0 |
| 1997 | 26 | 0 |
| 1998 | 24 | 0 |
| 1999 | 27 | 0 |
| 2000 | 53 | 0 |
| 2001 | 71 | 41 |
| 2002 | 79 | 91 |
| 2003 | 83 | 119 |
| 2004 | 103 | 112 |
| 2005 | 100 | 137 |
| 2006 | 117 | 139 |
| 2007 | 116 | 149 |
| 2008 | 120 | 140 |
| 2009 | 130 | 149 |
| 2010 | 128 | 125 |
| 2011 | 112 | 91 |
| 2012 | 103 | 110 |
| 2013 | 112 | 102 |
| 2014 | 131 | 144 |
| 2015 | 146 | 137 |
| 2016 | 168 | 122 |
| 2017 | 166 | 175 |
| 2018 | 165 | 163 |
| 2019 | 226 | 240 |
| 2020 | 246 | 239 |
| 2021 | 256 | 249 |
| 2022 | 243 | 283 |
| 2023 | 237 | 277 |
| 2024 | 245 | 235 |
| 2025 | 201 | 224 |
| 2026 | 130 | 135 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Delay locked loop device and method for operating the same6 Oct 2026US 12,756,397 B2Nanya Technology Corporation
- Method and device for adjusting phase of bidirectional data strobe (DQS) signal29 Sep 2026US 12,749,516 B2Shenzhen Pango Microsystems Co., Ltd
- Apparatuses and methods for simultaneous in data path compute operations22 Sep 2026US 12,743,206 B2
- Semiconductor memory device performing refresh operation using multiple delay circuits22 Sep 2026US 12,744,073 B2Micron Technology, Inc.
- Apparatuses, systems, and methods for data timing alignment with fast alignment mode22 Sep 2026US 12,744,074 B2Micron Technology, Inc.
- Memory device including bit line sense amplifier and operating method thereof8 Oct 2026US 2026/0311744 A1Samsung Electronics Co., Ltd.
- Apparatus with a selectable read control mechanism and methods for operating the same8 Oct 2026US 2026/0311747 A1Micron Technology, Inc.
- Word line booster circuit and method1 Oct 2026US 2026/0301794 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Memory system1 Oct 2026US 2026/0301801 A1Kioxia Corporation
- Staggered bank refresh in 3d-dram24 Sep 2026US 2026/0290422 A1Micron Technology, Inc.
Most cited
By later US patents
- Semiconductor memory device with dummy word line/sense amplifier activation436US 4,435,793 ATokyo Shibaura Denki Kabushiki Kaisha · 1984
- Apparatus for synchronously generating clock signals in a data processing system430US 5,243,703 ARambus Inc. · 1993
- Semiconductor signal processing device422US 8,274,841 B2Renesas Electronics Corporation · 2012
- High performance eDRAM sense amplifier420US 8,164,942 B2International Business Machines Corporation · 2012
- Semiconductor memory device419US 8,310,884 B2Kabushiki Kaisha Toshiba · 2012