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US 2026/0311747 A1Published application
Apparatus with a selectable read control mechanism and methods for operating the same
AssigneeMicron Technology, Inc.
InventorsWilliam Nguyen, Praneeth Namala, Seung Yeong Seo, Myung Ho Bae
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Abstract
Methods, apparatuses, and systems related to a memory device are described. The memory device includes a delay circuit configured to provide a selected delay setting from a range of delays. The delay circuit may be configured to control a relative timing between input voltages used to operate a sense amplifier for the memory device.
Claims20
A memory device comprising:
- memory cells configured to store charges representative of data values;
- a sense amplifier coupled to the memory cells and configured to amplify the stored charges for reading the data values, wherein the sense amplifier is configured to amplify using a first input voltage and a second input voltage;
- a control logic coupled to the sense amplifier and configured to generate a first control voltage and a second control voltage, wherein the first control voltage is for controlling the first input voltage and the second control voltage is for controlling the second input voltage;
- and
- at least one delay circuit coupled to the control logic and the sense amplifier, the at least one delay circuit configured to provide an adjustable delay to at least one of the first control voltage and the second control voltage.
2 more elements
An apparatus comprising:
- a charge storage circuit configured to store charges according to two or more charge ranges;
- an amplifier coupled to the charge storage circuit and configured to amplify the stored charges for determining a corresponding one of the two or more charge ranges, wherein the amplifier is configured to amplify using a first input voltage and a second input voltage;
- a control logic coupled to the amplifier and configured to generate at least a first control signal and a second control signal for operating the amplifier;
- and
- a delay circuit coupled to the control logic and the amplifier, the delay circuit configured to provide a set of selectable delays for the first and/or the second control signals, wherein one delay setting from the set of selectable delays is configured to be selected for controlling a temporal separation between the first input voltage and a second input voltage.
2 more elements
A method of operating a memory device, the method comprising:
- determining a predetermined delay setting for operating a sense amplifier in the memory device;
- selecting a delay path according to the predetermined delay setting;
- and
- communicating a control signal over the delay path, wherein the control signal is configured to control an input voltage to the sense amplifier.
1 more element
Dependencies are inferred from the claim text.