Apparatuses, systems, and methods for data timing alignment with fast alignment mode

An apparatus comprising:

• a plurality of core die, wherein a selected one of the plurality of core die is configured to provide mock data along a replica path;
• an interface die comprising:
• an oscillator circuit configured to provide an oscillating signal;
• a delay circuit configured to provide a delayed oscillating signal based on the oscillating signal with timing based on a delay code;
• a first delay adjustment circuit configured to provide a base clock signal based on the delayed oscillating signal;
• a first phase detector circuit configured to provide a first phase detector signal based on a phase difference between the mock data and the base clock signal;
• a second delay adjustment circuit configured to provide an adjusted clock signal based on the delayed oscillating signal;
• a second phase detector circuit configured to provide a second phase detector signal based on a phase difference between the mock data and the adjusted clock signal;
• and
• a data aligner control circuit configured to adjust the delay code based on the first phase detector signal and the second phase detector signal.

A method comprising:

• receiving mock data from selected one of a plurality of core die at an interface die, wherein the mock data has timing based in part, on an oscillating signal;
• generating a first adjusted clock signal based on the oscillating signal at a first time;
• generating a second adjusted clock signal based on the oscillating signal at a second time;
• measuring a first phase difference between the first adjusted clock signal and the mock data;
• measuring a second phase difference between the second adjusted clock signal and the mock data;
• and
• determining a data alignment adjustment state based on the first phase difference and the second phase difference.