Atomera Incorporated
LOS GATOS, CA, US· latest recorded location
ATOMERA INCORPORATED is named on 114 US grants and 165 published applications in this corpus. Its most frequent classification is H10D (Inorganic electric semiconductor devices).
- Granted patents
- 114
- Published applications
- 165
- Inventors
- 27
- Granted in 2026 so far
- 6
- Most recent grant
- 18 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2016 | 1 | 3 |
| 2017 | 4 | 3 |
| 2018 | 7 | 10 |
| 2019 | 18 | 21 |
| 2020 | 26 | 12 |
| 2021 | 7 | 11 |
| 2022 | 8 | 15 |
| 2023 | 11 | 10 |
| 2024 | 12 | 26 |
| 2025 | 14 | 36 |
| 2026 | 6 | 18 |
By publication year. 2026 runs to 8 Oct.
Technology areas
Share of 279 documents
- H10DInorganic electric semiconductor devices246
- H10PGeneric processes or apparatus for the manufacture or treatment of devices covered145
- H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by59
- B82YSpecific uses or applications of nanostructures35
- H10FSolar cells and light sensors34
- H10BElectronic memory devices28
- G11CStatic stores15
- H03HImpedance networks9
- H10NElectric solid-state devices not otherwise provided for9
- G02BOptical elements, systems or apparatus6
Recent patents
- Dynamic random access memory system including single-ended sense amplifiers and methods for operating same18 Aug 2026US 12,712,011 B2
- Gate-all-around (GAA) device including a superlattice11 Aug 2026US 12,707,690 B2
- Multi-chip memory system including DRAM chips with integrated comparator arrays and method of operating same19 May 2026US 12,635,122 B2
- Methods for making bipolar junction transistors including emitter-base and base-collector superlattices19 May 2026US 12,635,155 B2
- Method for making image sensor devices including a superlattice19 May 2026US 12,635,271 B2
- Radiation hardened (rad-hard) devices including a superlattice reservoir layer and related methods24 Sep 2026US 2026/0293250 A1
- Radiation hardened (rad-hard) devices including superlattice to control boron doping profile and related methods24 Sep 2026US 2026/0293251 A1
- Method for making radio frequency silicon-on-insulator (rfsoi) structure including a superlattice24 Sep 2026US 2026/0293623 A1
- Bipolar Junction Transistors Including Embedded Base Superlattice And Related Methods13 Aug 2026US 2026/0239639 A1
- Method for making piezoelectric devices including compound semiconductor materials and a superlattice layer2 Jul 2026US 2026/0190861 A1
Most cited
By later US patents
- Semiconductor devices including superlattice depletion layer stack and related methods108US 9,406,753 B22016
- Methods for making a semiconductor device including atomic layer structures using N2O as an oxygen source107US 9,558,939 B12017
- Semiconductor devices with superlattice layers providing halo implant peak confinement and related methods92US 9,899,479 B22018
- Semiconductor device including a superlattice and replacement metal gate structure and related methods77US 10,084,045 B22018
- Dram architecture to reduce row activation circuitry power and peripheral leakage and related methods76US 10,109,342 B22018