H10W 72/287
Flow barriers
Official title: {Flow barriers}
H10W72/287 (Flow barriers) appears on 374 US grants and 418 published applications in this corpus.
Search patents in H10W- Granted patents
- 374
- Published applications
- 418
- Assignees
- 163
- Inventors
- 854
- Latest grant
- 15 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1990 | 3 | 0 |
| 1991 | 1 | 0 |
| 1992 | 0 | 0 |
| 1993 | 1 | 0 |
| 1994 | 5 | 0 |
| 1995 | 1 | 0 |
| 1996 | 1 | 0 |
| 1997 | 0 | 0 |
| 1998 | 3 | 0 |
| 1999 | 1 | 0 |
| 2000 | 2 | 0 |
| 2001 | 4 | 1 |
| 2002 | 2 | 6 |
| 2003 | 7 | 6 |
| 2004 | 4 | 2 |
| 2005 | 2 | 8 |
| 2006 | 6 | 5 |
| 2007 | 5 | 11 |
| 2008 | 5 | 6 |
| 2009 | 2 | 14 |
| 2010 | 10 | 5 |
| 2011 | 9 | 16 |
| 2012 | 4 | 12 |
| 2013 | 13 | 20 |
| 2014 | 19 | 32 |
| 2015 | 33 | 47 |
| 2016 | 38 | 27 |
| 2017 | 29 | 28 |
| 2018 | 26 | 23 |
| 2019 | 25 | 27 |
| 2020 | 21 | 29 |
| 2021 | 18 | 28 |
| 2022 | 22 | 19 |
| 2023 | 20 | 17 |
| 2024 | 12 | 14 |
| 2025 | 13 | 9 |
| 2026 | 7 | 6 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Die package with sealed die enclosures15 Sep 2026US 12,738,918 B2QUALCOMM Incorporated
- Electronic device8 Sep 2026US 12,733,524 B2Advanced Semiconductor Engineering, Inc.
- Package structure and method for fabricating the same1 Sep 2026US 12,727,477 B2Wistron Neweb Corp.
- Semiconductor package7 Jul 2026US 12,677,684 B2LG Innotek Co., Ltd.
- Electronic package, packaging substrate and fabricating method thereof5 May 2026US 12,622,298 B2Siliconware Precision Industries Co., Ltd.
- Semiconductor package1 Oct 2026US 2026/0305413 A1LG Innotek Co., Ltd.
- Semiconductor devices with a solder bridge resistant substrate13 Aug 2026US 2026/0239997 A1Texas Instruments Incorporated
- Ring structure for interconnect structures and methods of forming the same11 Jun 2026US 2026/0165134 A1Taiwan Semiconductor Manufacturing Company.Ltd
- Flip-chip package structure9 Apr 2026US 2026/0101790 A1Siliconware Precision Industries Co., Ltd.
- Fan-out package including a photonic integrated circuit5 Mar 2026US 2026/0063859 A1Nokia Solutions and Networks Oy
Most cited
By later US patents
- Method of manufacturing electrical contacts, using a sacrificial member437US 5,476,211 AForm Factor, Inc. · 1995
- Method for manufacturing raised electrical contact pattern of controlled geometry196US 6,215,670 B1FormFactor, Inc. · 2001
- Solder bump fabrication methods and structure including a titanium barrier layer165US 5,767,010 AMcnc · 1998
- Method of making raised contacts on electronic components144US 5,852,871 AForm Factor, Inc. · 1998
- Method of mounting free-standing resilient electrical contact structures to electronic components128US 6,049,976 AFormFactor, Inc. · 2000